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H8S/2214 数据表(PDF) 254 Page - Renesas Technology Corp

部件名 H8S/2214
功能描述  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  936 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2214 数据表(HTML) 254 Page - Renesas Technology Corp

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Section 7 DMA Controller
Rev.4.00 Sep. 18, 2008 Page 194 of 872
REJ09B0189-0400
7.3.4
DMA Control Register (DMACR)
DMACR is a 16-bit readable/writable register that controls the operation of each DMAC channel.
In full address mode, DMACRA and DMACRB have different functions.
DMACR is initialized to H'0000 by a reset, and in standby mode.
(1) DMACRA
Bit
:
15
14
13
12
11
10
9
8
DMACRA
:
DTSZ
SAID
SAIDE
BLKDIR
BLKE
—
—
—
Initial value :
0
0
0
0
0
0
0
0
R/W
:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
(2) DMACRB
Bit
:
7
6
5
4
3
2
1
0
DMACRB
:
—
DAID
DAIDE
—
DTF3
DTF2
DTF1
DTF0
Initial value :
0
0
0
0
0
0
0
0
R/W
:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit 15—Data Transfer Size (DTSZ): Selects the size of data to be transferred at one time.
Bit 15
DTSZ
Description
0
Byte-size transfer
(Initial value)
1
Word-size transfer



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