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MCIMX503CVM8B 数据表(PDF) 32 Page - Freescale Semiconductor, Inc |
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MCIMX503CVM8B 数据表(HTML) 32 Page - Freescale Semiconductor, Inc |
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32 / 134 page ![]() i.MX50 Applications Processors for Consumer Products, Rev. 2 32 Freescale Semiconductor Electrical Characteristics 4.3.2 DDR2 I/O DC Parameters The DDR2 interface fully complies with JESD79-2E DDR2 JEDEC standard release April, 2008. The Jedec LPDDR2 specification (JESD209_2B) supersedes any specification in this document. The parameters in Table 18 are guaranteed per the operating ranges in Table 11, unless otherwise noted. Input current (100 K Ω PD) IIN VI = 0 VI=OVDD — — 0.25 36 μA External pull-up / pull-down resistor required to overdrive internal keeper Rext — — — 47 K Ω 1 To maintain a valid level, the transitioning edge of the input must sustain a constant slew rate (monotonic) from the current DC level through to the target DC level, VIL or VIH. Monotonic input transition time is from 0.1ns to 1s. VIL and VIH do not apply when hysteresis is enabled. 2 Hysteresis of 250 mV is guaranteed overall operating conditions when hysteresis is enabled. Table 18. DDR2 DC Electrical Characteristics DC Electrical Characteristics Symbol Test Conditions MIN TYP MAX Units High-level output voltage Voh — 0.9*ovdd — — V Low-level output voltage Vol — — — 0.1*ovdd V Output min source current1 1 ovdd=1.7 V; Vout=1.42 V. (Vout-ovdd)/Ioh must be less than 21 Ω for values of Vout between ovdd and ovdd-0.28 V. Ioh(dc) — -7.5 — — mA Output min sink current2 2 ovdd=1.7 V; Vout=280 mV. Vout/Iol must be less than 21 Ω for values of Vout between 0 V and 280 mV. Iol(dc) — 7.5 — — mA Input reference voltage Vref — 0.49*ovdd 0.5*ovdd 0.51*ovdd — DC input high voltage (data pins) Vihd(dc) — Vref+0.125 — ovdd+0.3 V DC input low voltage (data pins) Vild(dc) — -0.3 — Vref-0.125 V DC input voltage3 (clk pins) 3 Vin(dc) specifies the allowable dc excursion of each differential input. Vin(dc) — -0.3 — ovdd+0.3 V DC differential input voltage4 4 Vid(dc) specifies the input differential voltage |Vtr-Vcp| required for switching, where Vtr is the “pure” input level and Vcp is the “complementary” input level. the minimum value is equal to Vih(dc) - Vil(dc). Vid(dc) — 0.25 — ovdd+0.6 V Termination voltage5 5 Vtt is expected to track ovdd/2. Vtt — Vref-0.04 Vref Vref+0.04 — Input current6 (no pull-up/down) 6 Typ condition: typ model, 1.8 V, and 25 °C. Max condition: BCS model, 1.9 V, and 125 °C. Min condition: WCS model, 1.7 V, and -40 °C. Iin VI = 0 VI=ovdd —0.07 2 5 360 nA Tri-state I/O supply current6 Icc-ovdd VI = ovdd or 0 — 2.3 480 nA Tri-state 2.5V predrivers supply current6 Icc-vdd2p5 VI = ovdd or 0 — 6.4 750 nA Tri-state core supply current6 Icc-vddi VI = ovdd or 0 — 3.1 720 nA Table 17. GPIO DC Electrical Characteristics (continued) DC Electrical Characteristics Symbol Test Conditions MIN Typ MAX Units |
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