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MCIMX503CVM8B 数据表(PDF) 51 Page - Freescale Semiconductor, Inc

部件名 MCIMX503CVM8B
功能描述  i.MX50 Applications Processors for Consumer Products
PDF  134 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MCIMX503CVM8B 数据表(HTML) 51 Page - Freescale Semiconductor, Inc

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Electrical Characteristics
i.MX50 Applications Processors for Consumer Products, Rev. 2
Freescale Semiconductor
51
Figure 10. Write Data Latch Cycle Timing Diagram
Figure 11. Read Data Latch Cycle Timing Diagram
Table 39. Asynchronous Mode Timing Parameters1
ID
Parameter
Symbol
Timing
T2 = GPMI Clock Cycle3
Example Timing for
GPMI Clock
≈ 100MHz
T = 10ns
Unit
Min.
Max.
Min.
Max.
NF1
CLE setup time
tCLS
(AS+1)*T
—
10
—
ns
NF2
CLE hold time
tCLH
(DH+1)*T
—
20
—
ns
NF3
CEn setup time
tCS
(AS+1)*T
—
10
—
ns
NF4
CE hold time
tCH
(DH+1)*T
—
20
—
ns
CLE
CEn
WE
ALE
IO[7:0]
Data to NF
NF9
NF8
NF1
NF5
NF3
NF6
NF11
NF10
NF7
CLE
CEn
RE
RB
IO[7:0]
Data from NF
NF13
NF15
NF14
NF17
NF12
NF16



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