MCIMX503CVM8B datasheet(38/134 Pages) FREESCALE

38 / 134 page

i.MX50 Applications Processors for Consumer Products, Rev. 2

Freescale Semiconductor

Electrical Characteristics

4.4.3

HVIO Output Buffer Impedance

Table 25 shows the HVIO output buffer impedance of the i.MX50 processor.

NOTE

Output driver impedance is measured with long transmission line of

impedance Ztl attached to I/O pad and incident wave launched into

transmission line. Rpu/Rpd and Ztl form a voltage divider that defines

specific voltage of incident wave relative to OVDD. Output driver

impedance is calculated from this voltage divider (see Figure 3).

Table 25. HVIO Output Buffer Impedance

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

OVDD

1.95 V

OVDD

3.3 V

OVDD

1.875 V

OVDD

3.30V

OVDD

1.65 V

OVDD

2.68 V

Output driver

impedance

Rpu

Low drive strength, Ztl = 150

Medium drive strength, Ztl = 75

High drive strength, Ztl = 50

113.5

56.2

37.8

103.8

51.9

35.1

130.6

45.9

133

69.2

219.4

109.7

73.1

212.2

111.1

71.8

Output driver

impedance

Rpd

Low drive strength, Ztl =1 50

Medium drive strength, Ztl = 75

High drive strength, Ztl = 50

78.5

39.7

26.8

34.5

113.6

56.8

38.3

102

33.3

230.8

115.4

76.9

179.5

89.8

60.7

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