AN983 datasheet(37/91 Pages) ETC

37 / 91 page

AN983B

PCI/miPCI Fast Ethernet Controller with integrated PHY

WP4E

Wake-up Pattern Four Matched Enable.

R/W

WP5E

Wake-up Pattern Five Matched Enable.

R/W

24-18

---

Reserved

LinkOFF

Link Off Detect Enable. The AN983B will set the LSC bit of

CSR13 after it has detected that link status is from ON to

OFF.

R/W

LinkON

Link On Detect Enable. The AN983B will set the LSC bit of

CSR13 after it has detected that link status is from OFF to

ON.

R/W

15-11

---

Reserved

00001

WFRE

Wake-up Frame Received Enable. The AN983B will include

the “Wake-up Frame Received” event into wake-up events.

If this bit is set, AN983B will assert PMES bit of PMR1 after

AN983B has received a matched wake-up frame.

R/W

MPRE

Magic Packet Received Enable. The AN983B will include the

“Magic Packet Received” event into wake-up events. If this

bit is set, AN983B will assert PMES bit of PMR1 after AN983B

has received a Magic packet.

R/W

LSCE

Link Status Changed Enable. The AN983B will include the

“Link Status Changed” event into wake-up events. If this

bit is set, AN983B will assert PMES bit of PMR1 after AN983B

has detected a link status changed event.

R/W

7-3

---

Reserved

WFR

Wake-up Frame Received,

1: Indicates AN983B has received a wake-up frame. It is

cleared by write 1 or upon power-up reset. It is not

affected by a hardware or software reset.

R/W1C*

MPR

Magic Packet Received,

1: Indicates AN983B has received a magic packet. It is

cleared by write 1 or upon power-up reset. It is not

affected by a hardware or software reset.

R/W1C*

LSC

Link Status Changed,

1: Indicates AN983B has detected a link status change event.

It is cleared by write 1 or upon power-up reset. It is not

affected by a hardware or software reset.

R/W1C*

R/W1C*, Read only and Write one cleared.

CSR14 (offset = 70h), WPDR –Wake-up Pattern Data Register

All six wake-up patterns filtering information are programmed through WPDR register. The filtering

information is as follows,

Offset

0000h

Wake-up pattern 1 mask bits 31:0

0004h

Wake-up pattern 1 mask bits 63:32

ADMtek Inc.

www.admtek.com.tw

Rev. 1.8

AN983 数据表(PDF) 37 Page - List of Unclassifed Manufacturers

AN983 数据表(HTML) 37 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91

数据表下载

链接网址

AN983 数据表(PDF) 37 Page - List of Unclassifed Manufacturers

AN983 数据表(HTML) 37 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91

数据表 下载

链接网址

数据表下载