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AN983 数据表(PDF) 40 Page - List of Unclassifed Manufacturers

部件名 AN983
功能描述  PCI/miniPCI-to-Ethernet LAN Controller
PDF  91 Pages
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制造商  ETC [List of Unclassifed Manufacturers]
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标志 ETC - List of Unclassifed Manufacturers

AN983 数据表(HTML) 40 Page - List of Unclassifed Manufacturers

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AN983B
PCI/miPCI Fast Ethernet Controller with integrated PHY
15
AAISS
Added Abnormal Interrupt Status Summary.
1: any of added abnormal interrupt happened.
0
RO/LH*
14~0
These bits are the same as the status register of CSR5. You
can access those status bits through either CSR5 or CSR16.
RO/LH*
LH* = High Latching and cleared by writing 1.
CSR17 (offset = 84h), ACSR7- Assistant CSR7 (Interrupt enable register 2)
Bit #
Name
Descriptions
Default Val RW Type
31
TEIE
Transmit Early Interrupt Enable
0
R/W
30
REIE
Receive Early Interrupt Enable
0
R/W
29
LCIE
Link Status Change Interrupt Enable
0
R/W
28
TDIE
Transmit Deferred Interrupt Enable
0
R/W
27
---
Reserved
26
PFRIE
PAUSE Frame Received Interrupt Enable
0
R/W
25~17
---
Reserved
16
ANISE
Added Normal Interrupt Summary Enable.
1: adds the interrupts of bit 30 and 31 of ACSR7 to the
normal interrupt summary (bit 16 of CSR5).
0
R/W
15
AAIE
Added Abnormal Interrupt Summary Enable.
1: adds the interrupt of bit 26, 28 and 29 of ACSR7 to the
abnormal interrupt summary.
0
R/W
14~0
These bits are the same as the interrupt enable register of
CSR7. You can access those interrupt enable bits through
either CSR7 or CSR16.
R/W
CSR18 (offset = 88h), CR - Command Register, bit31 to bit16
Automatically recall from EEPROM
Bit #
Name
Descriptions
Default Val
RW
Type
31
D3CS
D3cold support, mapped to CR48<31>
1
From
EEPROM
R/W
30-28
AUXCL
Aux Current. These three bits report the maximum 3.3 Vaux
current requirements for AN983B. If bit 31 of PMR0 is ‘1’, the
default value is 0101b, means AN983B need 100 mA to
support remote wake-up in D3cold power state.
010b
From
EEPROM
RO
27
PMEP
Actively type select
1: create a negative 50ms pulse
0: create a positive 50ms pulse
This bit is only active when PMEP enable CSR18 bit 26
0 from
EEPROM
R/W
26
PMEPEN
PMEP pin enable
1: enable
0: disable (this pin will be input, to compatible with AN983
circuit)
0 from
EEPROM
R/W
ADMtek Inc.
www.admtek.com.tw
Rev. 1.8
40



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