AN983 datasheet(44/91 Pages) ETC

44 / 91 page

AN983B

PCI/miPCI Fast Ethernet Controller with integrated PHY

20~16

TBCNT

Transmit Burst Count

After this number of consecutive successful transmit,

transmit completed interrupt will be generated.

Continuously do this function if no reset.

R/W

11~0

TTO

Transmit Time-Out = (deferred time + back-off time).

When the TDIE (bit28 of ACSR7) is set, the timer is decreased

in unit of 2.56us(100M) or 25.6us(10M). If the timer expires

before another packet transmit begin, then the TDIE

interrupt will be generated.

R/W

CSR24 (offset = a0h) - FROM, Flash ROM (also the boot ROM) port

Bit #

Name

Descriptions

Default Val RW Type

Bra16_on This bit is only effective while 4 LED mode selected (bit 23 of

CSR18 is set).

When 4 LED mode selected, and this bit is set, then pin 105

is defined as brA16, else it is defined as LED pin – fd/col.

R/W

30~28

---

Reserved

REN

Read enable, clear if read data is ready in DATA, bit7-0 of

FROM.

R/W

WEN

Write enable, cleared if write completed

R/W

25~8

ADDR

Flash ROM address

R/W

7~0

DATA

Read/Write data of flash ROM

R/W

CSR25 (offset = a4h) - PAR0, physical address register 0

Automatically recall from EEPROM

Bit #

Name

Descriptions

Default Val RW Type

31~24

PAB3

Physical address byte 3

From

EEPROM

R/W

23~16

PAB2

Physical address byte 2

From

EEPROM

R/W

15~8

PAB1

Physical address byte 1

From

EEPROM

R/W

7~0

PAB0

Physical address byte 0

From

EEPROM

R/W

CSR26 (offset = a8h) - PAR1, physical address register 1

Automatically recall from EEPROM

Bit #

Name

Descriptions

Default Val RW Type

31~24

---

Reserved

23~16

---

Reserved

15~8

PAB5

Physical address byte 5

From

EEPROM

R/W

7~0

PAB4

Physical address byte 4

From

EEPROM

R/W

ADMtek Inc.

www.admtek.com.tw

Rev. 1.8

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