AN983 datasheet(46/91 Pages) ETC

46 / 91 page

AN983B

PCI/miPCI Fast Ethernet Controller with integrated PHY

CSR_30(offset = b8h) - UAR1, unicast address register 1

Bit #

Name

Descriptions

Default Val RW Type

31~24

UAB7

Unicast address byte 7 (hash table 63:56)

R/W

23~16

UAB6

Unicast address byte 6 (hash table 55:48)

R/W

15~8

UAB5

Unicast address byte 5 (hash table 47:40)

R/W

7~0

UAB4

Unicast address byte 4 (hash table 39:32)

R/W

Unicast64 Algorithm:

The algorithm is the with multicast64.

Operation Mode Register (offset 0FCh)

Bit #

Name

Descriptions

Default Val RW Type

SPEED

Network Speed Status

1: 100M

0: 10M

Full/Half Duplex Status

1: Full duplex

0: Half duplex

LINK

Network Link Status

1: Link On

2: Link Off

28~27

Reserved

EERLOD

Write 1 to this bit will cause AN983B to reload data from

EEPROM. After reload completed, this bit will be cleared

automatically.

R/W

25~3

Reserved

2~0

OpMode

These three bits are used to configure AN983B’s operation

mode:

111b: Single Chip mode (Normal operation)

At this mode, AN983B is configured as single chip to provide

PCI to Ethernet controller.

100b: MAC-only mode

The AN983B is configured as a MAC only controller, it provide

standard MII interface to link to the external PHY. The MII

interface pins are multiplexed with BootROM interface.

Others: For diagnostic purpose.

111b

R/W

ADMtek Inc.

www.admtek.com.tw

Rev. 1.8

AN983 数据表(PDF) 46 Page - List of Unclassifed Manufacturers

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