AN983 datasheet(66/91 Pages) ETC

66 / 91 page

AN983B

PCI/miPCI Fast Ethernet Controller with integrated PHY

1. IFG1 time (64-bit time):

If a carrier is detected on the medium during this time, the

AN983B

will reset the IFG1 time counter and restart to monitor the channel for an idle again.

2. IFG2 time (32-bit time): After counting the IFG2 time the AN983B will access the channel

even though a carrier has been sensed on the network.

Collision Handling

The scheduling of re-transmissions is determined by a controlled randomization process

called “truncated binary exponential back-off”. At the end of enforcing a collision (jamming),

the AN983B delays before attempting to re-transmit the packet. The delay is an integer

multiple of slot time. The number of slot times to delay before the nth re-transmission

attempt is chosen as a uniform distributed integer r in the range:

0≦ r < 2

where

k = min(n, 10)

8.5.2 TRANSCEIVER OPERATION

In the transceiver portion of the AN983B, it integrates the IEEE802.3u compliant functions of PCS

(physical coding sub-layer), PMA (physical medium attachment) sub-layer, and PMD (physical

medium dependent) sub-layer for 100BASE-TX, and the IEEE802.3 compliant functions of

Manchester encoding/decoding and transceiver for 10BASE-T. All the functions and operation

schemes are described in the following sections.

100BASE-TX Transmit Operation

Regarding the 100BASE-TX transmission, the transceiver provides the transmission

functions of PCS, PMA, and PMD for encoding of MII data nibbles to five-bit code-groups

(4B/5B), scrambling, serialization of scrambled code-groups, converting the serial NRZ code

into NRZI code, converting the NRZI code into MLT3 code, and then driving the MLT3 code

into the category 5 Unshielded Twisted Pair cable through an isolation transformer with the

turns ratio of 1: 1.

Data code-groups Encoder:

In normal MII mode application, the transceiver receives nibble type 4B data via the

TxD0~3 inputs of the MII. These inputs are sampled by the transceiver on the rising

edge of Tx-clk and passed to the 4B/5B encoder to generate the 5B code-group used by

100BASE-TX.

Idle code-groups

In order to establish and maintain the clock synchronization, the transceiver needs to

keep transmitting signals to medium. The transceiver will generate Idle code-groups

for transmission when there is no real data want to be sent by MAC.

ADMtek Inc.

www.admtek.com.tw

Rev. 1.8

AN983 数据表(PDF) 66 Page - List of Unclassifed Manufacturers

AN983 数据表(HTML) 66 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91

数据表下载