AN983 datasheet(11/91 Pages) ETC

11 / 91 page

AN983B

PCI/miPCI Fast Ethernet Controller with integrated PHY

3. FEATURES

INDUSTRY STANDARD

IEEE802.3u 100BASE-TX and IEEE802.3 10BASE-T compliant

Support for IEEE802.3x flow control

IEEE802.3u Auto-Negotiation support for 10BASE-T and 100BASE-TX

PCI Specification 2.2 compliant

ACPI and PCI power management Ver.1.1 compliant

Support PC99 wake on LAN

FIFO

Provides two independent long FIFOs with 2k bytes each for transmission and receiving

Pre-fetch up to two transmit packets to minimize inter frame gap (IFG) to 0.96us

Retransmits collided packet without reload from host memory within 64 bytes.

Automatically retransmits FIFO under-run packet with maximum drain threshold until 3

times retry failure and that will not influence the registers and transmit threshold of next

packet

PCI I/F

Provides 32-bit PCI bus master data transfer

Supports PCI clock with frequency from 0Hz to 33MHz

Supports network operation with PCI system clock from 20MHz to 33MHz

Provides performance meter, PCI bus master latency timer, for tuning the threshold to

enhance the performance

Provides burst transmit packet interrupt and transmit/receive early interrupt to reduce

host CPU utilization

Supports memory-read, memory-read-line, memory-read-multiple, memory-write,

memory-write-and-invalidate command while being bus master

Supports big or little endian byte ordering

EEPROM/BOOT ROM I/F

Provides write-able Flash ROM and EPROM as boot ROM with size up to 128kB

Provides PCI to access boot ROM by byte, word, or double word

Re-writes Flash boot ROM through I/O port by programming register

ADMtek Inc.

www.admtek.com.tw

Rev. 1.8

AN983 数据表(PDF) 11 Page - List of Unclassifed Manufacturers

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