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TNETV2840ENGGU 数据表(PDF) 26 Page - Texas Instruments |
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TNETV2840ENGGU 数据表(HTML) 26 Page - Texas Instruments |
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26 / 91 page  Functional Overview 26 December 1999 − Revised October 2008 SPRS122F Page 0 Data Memory Page 1 Program Memory Page 2 Page 3 0000h 8000h FFFFh MPDC MPDC Page 0 Data Memory Page 1 Program Memory Page 2 Page 3 MPCD3 0000h 8000h FFFFh MPDC : reserved MPCD3 MPCD0 MPCD1 MPCD2 MPCD0 MPCD1 MPCD2 Memory Map with OVLY = 0 Memory Map with OVLY = 1 MPDC MPDC MPDC MPCD3 MPCD3 MPCD3 MDC0 or MDC1 MDC0 or MDC1 NOTES: A. MPDC: local program/data memory in subsystem C B. MDC: local data memory in subsystem C. MDC is controlled by the data memory map register (DMMR). DMMR=0, MDC0 is mapped in 8000h − FFFFh. DMMR=1, MDC1 is mapped in 8000h − FFFFh. C. MPCD: shared program memory in subsystems C and D Figure 3−5. Subsystem C CPU Memory Map |
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