TNETV2840ENGGU datasheet(65/91 Pages) TI1

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Electrical Specifications

December 1999 − Revised October 2008

SPRS122F

5.3

Electrical Characteristics Over Recommended Operating Case Temperature

Range (Unless Otherwise Noted)

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

UNIT

VOH

High-level output voltage‡

VDD = 3.3 ± 0.3 V, IOH = MAX

2.4

VOL

Low-level output voltage‡

IOL = MAX

0.4

IIZ

Input current in high impedance

VDD = MAX, VO = VSS to VDD

−10

IIZ

Input current in high impedance

VDD = MAX, VO = VSS to VDD

−10

µA

Input current

TRST

With internal pulldown

300

Input current

(VI = VSS to VDD)

See pin descriptions

With internal pullups

−300

−10

(VI = VSS to VDD)

D[15:0], HA[18:0]

Bus holders enabled, VDD = MAX||

−275

275

µA

All other input-only pins

−10

IDDC

Supply current, all four core CPUs

CVDD = 1.6 V, fx = 133 MHz§,

TC = 25°C

200¶

IDDP

Supply current, pins

DVDD = 3.3 V, fclock = 133 MHz¶,

TC = 25°C#

IDDA

Supply current, PLL

IDDC

Supply current, standby

IDLE2

PLL

× n mode, 20 MHz input

IDDC

Supply current, standby

IDLE3

PLL x n mode, 20 MHz input

Input capacitance

Output capacitance

† All values are typical unless otherwise specified.

‡ All input and output voltage levels except x_RS, x_INT, x_NMI, CLKIN, x_BCLKX0, x_BCLKR0, BCLKX2, BCLKR2, HAS, HCS, HDS1, HDS2,

and RESET are LVTTL-compatible.

§ Clock mode: PLL × 1 with external source

¶ This value is based on 50% usage of MAC and 50% usage of NOP instructions. Actual operating current varies with the program being executed.

# This value was obtained using the following conditions: HPI in multiplexed mode with address autoincrement, HPI read, CLKOFF = 0, full-duplex

operation of all 12 McBSPs at a rate of 10 million bits per second each, and 15-pF loads on all outputs. For more details on how this calculation

is performed, refer to the Calculation of TMS320LC54x Power Dissipation Application Report (literature number SPRA164).

|| VIL(MIN) ≤ VI ≤ VIL(MAX) or VIH(MIN) ≤ VI ≤ VIH(MAX)

Tester Pin

Electronics

VLoad

IOL

IOH

Output

Under

Test

Ω

Where:

IOL

1.5 mA (all outputs)

IOH

300

µA (all outputs)

VLoad = 1.6 V

20 pF typical load circuit capacitance

Figure 5−1. 3.3-V Test Load Circuit

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