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TNETV2840ENGGU 数据表(PDF) 53 Page - Texas Instruments |
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TNETV2840ENGGU 数据表(HTML) 53 Page - Texas Instruments |
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53 / 91 page  Functional Overview 53 December 1999 − Revised October 2008 SPRS122F 15 14 13 12 11 10 987 6 5 4 3210 TOUT Rsvd X_BIO X_XF GPIO DIR3 GPIO DIR2 GPIO DIR1 GPIO DIR0 CLK OUT1 CLK OUT0 Reserved GPIO DAT3 GPIO DAT2 GPIO DAT1 GPIO DAT0 R/W+0 R/W+0 R/W+0 R/W+0 R/W+0 R/W+0 R/W+0 R/W+0 R/W+0 R/W+0 R/W+0 R/W+0 R/W+0 LEGEND: R = Read, W = Write, +0 = Value at reset Figure 3−27. General-Purpose I/O Control Register Table 3−19. General-Purpose I/O Control Register Bit Functions BIT NO. BIT NAME BIT VALUE FUNCTION 15 TOUT 0 Timer output disable. Uses GPIO3 as general-purpose I/O. 15 TOUT 1 Timer output enable. Overrides DIR3. Timer output is driven on GPIO3 and readable in DAT3. 14 Reserved X Register bit is reserved. Read 0, write has no effect. 0 Branch control input disable. Uses GPIO1 as general-purpose I/O. 13 X_BIO 1 Branch control input enable. Overrides DIR1. The X_BIO output is driven on GPIO1 and readable in DAT0. 12 X_XF 0 External flag output disable. Uses GPIO0 as general-purpose I/O. 12 X_XF 1 External flag output enable. Overrides DIR0. The X_XF output is driven on GPIO0 and readable in DAT1. 11−8 GPIO 0 GPIOn pin is used as an input. 11−8 GPIO DIRn† 1 GPIOn pin is used as an output. 7−6 CLKOUT CLKOUT muxing selection bits. CLKOUT1[7] CLKOUT0[6] A_CLKOUT 0 0 (default) B_CLKOUT 0 1 C_CLKOUT 1 0 D_CLKOUT 1 1 5−4 Reserved X Register bit is reserved. Read 0, write has no effect. 3−0 GPIO † 0 GPIOn is driven with a 0 (DIRn = 1). GPIOn is read as 0 (DIRn = 0). 3−0 GPIO DATn† 1 GPIOn is driven with a 1 (DIRn = 1). GPIOn is read as 1 (DIRn = 0). † n = 3, 2, 1, or 0 The timer output (TOUT) bit is used to multiplex the output of the timer and GPIO3. The X_XF bit is used to multiplex the output of the external flag, and the X_BIO bit is used to multiplex the input of the branch control. The watchdog enable (WDEN) bit in the watchdog timer second control register (WDTSCR) is used to multiplex the watchdog timer output and GPIO2. All GPIO pins are programmable as an input or output by the direction bit (GPIODIRn). Data is either driven or read from the data bit field (GPIODATn). GPIODIR3 has no effect when TOUT = 1. |
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