GXM datasheet(129/244 Pages) NSC

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Integrated Functions (Continued)

4.5

DISPLAY CONTROLLER

The GXm processor incorporates a display controller that

retrieves display data from the memory controller and for-

mats it for output on a variety of display devices. The GXm

processor can directly connect to an active matrix TFT

LCD flat panel or to an external RAMDAC for CRT display

or both. The display controller includes a display FIFO,

compression/decompression (CODEC) hardware, hard-

ware cursor, a 256-entry-by-18-bit palette RAM (plus

three extension colors), display timing generator, dither

and frame-rate-modulation circuitry for TFT panels, and

flexible output formatting logic. A diagram of the display

controller subsystem is shown in Figure 4-14.

Figure 4-14. Display Controller Block Diagram

Memory

Data

Compressed

Codec

Cursor

Palette

Extensions

Palette

Dither

Output

RAMDAC

Panel

Control Registers

Timing

Memory

Address

Output

Control

Pseudo/True

Color Mux

Line Buffer

(64x32 bit)

Display

FIFO

(64x64 bit)

Latch

RAM

(264x18

Palette Data

and

FRM

Format

Addr.

Logic

Generator

and

Control Logic

Address

Generator

bit)

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