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PC87309VLJ 数据表(PDF) 28 Page - National Semiconductor (TI) |
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PC87309VLJ 数据表(HTML) 28 Page - National Semiconductor (TI) |
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28 / 192 page ![]() Configuration 28 www.national.com TABLE 2-17. KBC Configuration Registers for Keyboard - Logical Device 6 2.4 CARD CONTROL REGISTERS This section describes the registers at first level indexes in the range 20h - 2Fh. 2.4.1 SID Register This read-only register contains the identity number of the chip. The PC87309VLJ is identified by the value E0h in this register. 2.4.2 SuperI/O Configuration 1 Register (SIOCF1) This register can be read or written. It is reset by hardware according to the BADDRs and the CFG0 strap pins see TA- BLE 2-1 "Strap Pins and Base Addresses" on page 20. Bit 1,0 - BADDR1 and BADDR0 Initialized on reset by BADDR1 and BADDR0 strap pins (BADDR0 on bit 0). These bits select the addresses of the configuration Index and Data registers and the PnP ISA Serial Identifier. See TABLE 2-1 "Strap Pins and Base Addresses" on page 20. Bit 2 - PC-AT or PS/2 Drive Mode Select 0: PS/2 drive mode. 1: PC-AT drive mode. (Default) Bit 3 - CFG0 Bit Initialized on reset by CFG0 strap pin. This read-only bit selects between Full-IR and Two-UART modes. 0: Full-IR mode. 1: Two-UART mode. Index R/W Hard Reset Soft Reset Configuration Register or Action 30h R/W 01h No Effect Activate. See also FER1 of Power Management device (Logical Device 4). 31h R/W 00h No Effect I/O Range Check. 60h R/W 00h No Effect Base Address MSB Register. Bits 7-3 (for A15-11) are read only, 00000b. 61h R/W 60h No Effect Base Address LSB Register. Bits 2-0 are read only 000b. 62h R/W 00h No Effect Command Base Address MSB Register. Bits 7-3 (for A15-11) are read only, 00000b. 63h R/W 64h No Effect Command Base Address LSB. Bits 2-0 are read only 100b. 70h R/W 01h No Effect KBC Interrupt (KBC IRQ1 pin) Select. 71h RW 02h No Effect KBC Interrupt Type. Bits 1,0 are read/write; others are read only. 74h R 04h No Effect Report no DMA assignment. 75h R 04h No Effect Report no DMA assignment. F0h R/W See Section 2.9. No Effect SuperI/O KBC Configuration Register. 76543210 Reset Required 0 0 0 0 0 1 1 1 0 0 0 0 0 1 1 1 SID Index 20h Register, Chip ID General Purpose Scratch Bits 76543210 Reset Required x x 1 x 0 0 0 0 SuperI/O Configuration 1 Index 21h BADDR0 PC-AT or PS/2 Drive Mode Select BADDR1 CFG0 Lock Scratch Bit KBC-Lock Register (SIOCF1), |
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