PC87309VLJ datasheet(36/192 Pages) NSC

36 / 192 page

The Floppy Disk Controller (FDC) (Logical Device 0)

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The controller maximizes the internal digital data separator

by implementing a read algorithm that enhances the lock

characteristics of the fully digital Phase-Locked Loop (PLL).

The algorithm minimizes the effect of bad data on the syn-

chronization between the PLL and the data.

It does this by forcing the fully digital PLL to re-lock to the

clock reference frequency any time the data separator at-

tempts to lock to a non-preamble pattern. See the state di-

agram of this read algorithm in FIGURE 3-3.

FIGURE 3-3. Read Algorithm State Diagram

3.2.3

Perpendicular Recording Mode Support

The FDC is fully compatible with perpendicular recording

mode disk drives at all data transfer rates. These perpendic-

ular drives are also called 4 Mbyte (unformatted) or 2.88

Mbyte (formatted) drives. This refers to their maximum stor-

age capacity.

Perpendicular recording orients the magnetic flux changes

(which represent bits) vertically on the disk surface, allow-

ing for a higher recording density than conventional longitu-

dinal recording methods. This increased recording density

increases data rate by up to 1 Mbps, thereby doubling the

storage capacity. In addition, the perpendicular 2.88 MB

drive is read/write compatible with 1.44 MB and 720 KB dis-

kettes (500 Kbps and 250 Kbps respectively).

The 2.88 MB drive has unique format and write data timing

requirements due to its read/write head and pre-erase head

design. This is illustrated in FIGURE 3-4.

Unlike conventional disk drives which have only a

read/write head, the 2.88 MB drive has both a pre-erase

head and read/write head. With conventional disk drives,

the read/write head, itself, can rewrite the disk without prob-

lems. 2.88 MB drives need a pre-erase head to erase the

magnetic flux on the disk surface before the read/write head

can write to the disk surface. The pre-erase head is activat-

ed during disk write operations only, i.e. FORMAT and

WRITE DATA commands.

In 2.88 MB drives, the pre-erase head leads the read/write

head by 200

µm, which translates to 38 bytes at 1 Mbps (19

bytes at 500 Kbps).

FIGURE 3-4. Perpendicular Recording Drive

Read/Write Head and Pre-Erase Head

For both conventional and perpendicular drives, WGATE is

asserted with respect to the position of the read/write head.

With conventional drives, this means that WGATE is assert-

ed when the read/write head is located at the beginning of

the preamble to the data field.

With 2.88 MB drives, since the preamble must be erased

before it is rewritten, WGATE should be asserted when the

pre-erase head is located at the beginning of the preamble

to the data field. This means that WGATE should be assert-

ed when the read/write head is at least 38 bytes (at 1 Mbps)

before the preamble. TABLES 3-14 on page 63 and 3-15 on

page 63 show how the perpendicular format affects gap 2

and, consequently, WGATE timing, for different data rates.

Because of the 38-byte spacing between the read/write

head and the pre-erase head at 1 Mbps, the gap 2 length of

22 bytes used in the standard IBM disk format is not long

enough. The format standard for 2.88 MB drives at 1 Mbps

called the Perpendicular Format, increases the length of

gap 2 to 41 bytes. See FIGURE 3-5 on page 59.

The PERPENDICULAR MODE command puts the Floppy

Disk Controller (FDC) into perpendicular recording mode,

which allows it to read and write perpendicular media. Once

this command is invoked, the read, write and format com-

mands can be executed in the normal manner. The perpen-

dicular mode of the FDC functions at all data rates,

adjusting format and write data parameters accordingly.

See Section 3.7.9 on page 62 for more details.

3.2.4

Data Rate Selection

The FDC sets the data rate in two ways. For PC compatible

software, the Configuration Control Register (CCR) at offset

07h programs the data rate for the FDC. The lower bits D1

and D0 in the CCR set the data rate. The other bits should

be set to zero. TABLE 3-5 on page 43 shows how to encode

the desired data rate.

The lower two bits of the Data rate Select Register (DSR) at

offset 04h can also set the data rate. These bits are encod-

ed like the corresponding bits in the CCR. The remainder of

the bits in the DSR have other functions. See the descrip-

tion of the DSR in Section 3.3.6 on page 43 for more details.

The data rate is determined by the last value written to ei-

ther the CCR or the DSR. Either the CCR or the DSR can

override the data rate selection of the other register. When

the data rate is selected, the micro-engine and data sepa-

rator clocks are scaled appropriately.

Not

sixth bit.

Read Gate = 1

Read Gate = 0

PLL

to data.

Wait six bits.

Three address

Wait for

is not a

bit.

Bit is

preamble.

Bit is not

preamble.

Three address

marks found.

Check for

three address

mark bytes.

Not third

address mark.

PLL idle

locked

to clock.

Operation

completed.

Read ID

field or

data field.

locking

first bit that

preamble

marks not found.

200

µm

(38 bytes @ 1 Mbps)

End of

ID Field

Data Field

Preamble

Intersector

Read/

Pre-

Head

Write

Gap 2

= 41 x 4Eh

Erase

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