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PC87309VLJ 数据表(PDF) 13 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 PC87309VLJ
功能描述  PC87309 SuperI/O Plug and Play Compatible Chip in Compact 100-Pin VLJ Packaging
PDF  192 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

PC87309VLJ 数据表(HTML) 13 Page - National Semiconductor (TI)

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Signal/Pin Connection and Description
13
www.national.com
1.2
SIGNAL/PIN DESCRIPTIONS
TABLE 1-1 lists the signals of the PC87309 in alphabetical
order and shows the pin(s) associated with each. TABLE
1-2 on page 18 lists the signals that are multiplexed in Full-
IR and Two-UART modes. TABLE 1-3 on page 18 lists the
pins that have strap functions during reset.
The Module column indicates the functional module that is
associated with these pins. In this column, the System label
indicates internal functions that are common to more than
one module. The I/O and Group # column describes wheth-
er the pin is an input, output, or bidirectional pin (marked as
Input, Output or I/O, respectively).
TABLE 1-1. Signal/Pin Description Table
Signal/Pin
Name
Pin
Number
Module
I/O and
Group #
Function
A11-0
93, 20-16,
14-9
ISA-Bus
Input
Group 1
ISA-Bus Address – A11-0 are used for address decoding on any
access except DMA accesses, on the condition that the AEN signal is
low.
A11 is multiplexed with CTS2 on pin 93 and available in Full-IR mode
only. Since A11 is required to support full ISA PnP mode (for
decoding A79h), this mode is not available in Two-UART mode.
See Section 2.2.2.
ACK
68
Parallel Port
Input
Group 3
Acknowledge – This input signal is pulsed low by the printer to
indicate that it has received data from the parallel port. This pin is
internally connected to an internal weak pull-up.
AFD
74
Parallel Port
I/O
Group 8
Automatic Feed – When this signal is low the printer should
automatically feed a line after printing each line. This pin is in TRI-
STATE after a 0 is loaded into the corresponding control register bit.
An external 4.7 K
Ω pull-up resistor should be attached to this pin.
This signal is multiplexed with DSTRB. See TABLE 4-12 on page 101
for more information.
AEN
21
ISA-Bus
Input
Group 1
DMA Address Enable – This input signal disables function selection
via A11-0 when it is high. Access during DMA transfer is not affected
by this signal. This pin is used for external decoding of A11-15 in
Two-UART mode or A15-12 in Full-IR mode.
ASTRB
73
Parallel Port
Output
Group 8
Address Strobe (EPP) – This signal is used in EPP mode as an
address strobe. It is active low.
This signal is multiplexed with SLIN. See TABLE 4-12 on page 101 for
more information.
BADDR1,0
88,86
Configuration
Input
Group 4
Base Address Strap Pins 0 and 1 – These pins determine the base
addresses of the Index and Data registers, the value of the Plug and
Play ISA Serial Identifier and the configuration state immediately after
reset. These pins are pulled down by internal 30 K
Ω resistors.
External 10 K
Ω pull-up resistors to V
DD should be employed.
BADDR1 is multiplexed with RTS1.
BADDR0 is multiplexed with DTR1 and BOUT1.
See TABLE 2-1 and Section 2.1.
BOUT2,1
96,86
UART1,
UART2
Output
Group 12
Baud Output – This multi-function pin provides the associated serial
channel Baud Rate generator output signal if test mode is selected,
i.e., bit 7 of the EXCR1 register is set. See “Bit 7 - Baud Generator
Test (BTEST)” on page 121.
After Master Reset this pin provides the DTR function.
BOUT2 is multiplexed with DTR2, IRSL2 and ID2.
BOUT1 is multiplexed with DRT1 and BADDR0.
BUSY
66
Parallel Port
Input
Group 2
Busy – This pin is set high by the printer when it cannot accept
another character. It is internally connected to a weak pull-down
resistor.
This signal is multiplexed with WAIT. See TABLE 4-12 on page 101 for
more information.



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