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EM357-RTR 数据表(PDF) 186 Page - Silicon Laboratories |
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EM357-RTR 数据表(HTML) 186 Page - Silicon Laboratories |
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186 / 241 page ![]() Rev 1.3 186 Address: 0x4000D010 Reset: 0x0 Address: 0x4000D014 Reset: 0x0 Register 10.5. ADC_DMACFG: ADC DMA Configuration Register Bit 31 30 29 28 27 26 25 24 Name 0 0 0 0 0 0 0 0 Bit 23 22 21 20 19 18 17 16 Name 0 0 0 0 0 0 0 0 Bit 15 14 13 12 11 10 9 8 Name 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Name 0 0 0 ADC_DMARST 0 0 ADC_DMAAUTOWRAP ADC_DMALOAD Bitname Bitfield Access Description ADC_DMARST [4] W Write 1 to reset the ADC DMA. This bit auto-clears. ADC_DMAAUTOWRAP [1] RW Selects DMA mode. 0: Linear mode, the DMA stops when the buffer is full. 1: Auto-wrap mode, the DMA output wraps back to the start when the buffer is full. ADC_DMALOAD [0] RW Loads the DMA buffer. Write 1 to start DMA (writing 0 has no effect). Cleared when DMA starts or is reset. Register 10.6. ADC_DMASTAT: ADC DMA Status Register Bit 31 30 29 28 27 26 25 24 Name 0 0 0 0 0 0 0 0 Bit 23 22 21 20 19 18 17 16 Name 0 0 0 0 0 0 0 0 Bit 15 14 13 12 11 10 9 8 Name 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Name 0 0 0 0 0 0 ADC_DMAOVF ADC_DMAACT Bitname Bitfield Access Description ADC_DMAOVF [1] R DMA overflow: occurs when an ADC result is ready and the DMA is not active. Cleared by DMA reset. ADC_DMAACT [0] R DMA status: reads 1 if DMA is active. |
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