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EM357-RTR 数据表(PDF) 182 Page - Silicon Laboratories |
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EM357-RTR 数据表(HTML) 182 Page - Silicon Laboratories |
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182 / 241 page ![]() Rev 1.3 182 Table 10.9 lists other specifications for the ADC not covered in Tables 10.6, 10.7, and 10.8. Table 10.9. ADC Specifications* Parameter Min Typ Max Units VREF 1.17 1.2 1.23 V VREF output current 1 mA VREF load capacitance 10 nF External VREF voltage range 1.1 1.2 1.3 V External VREF input impedance 1 M Minimum input voltage 0 V Maximum input voltage VREF V Single-ended signal range 0 VREF V Differential signal range –VREF +VREF V Common mode range 0 VREF V Input referred ADC offset –10 10 mV Input Impedance 1 MHz sample clock 6 MHz sample clock Not sampling 1 0.5 10 M *Note: The signal-ended ADC measurements are limited in their range and only guaranteed for accuracy within the limits shown in this table. The ADC's internal design allows for measurements outside of this range (±200 mV), but the accuracy of such measurements is not guaranteed. The maximum input voltage is of more interest to the differential sampling where a differential measurement might be small, but a common mode can push the actual input voltage on one of the signals towards the upper voltage limit. |
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