TNETV6446AINZWT datasheet(45/227 Pages) TI1

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TMS320DM6446

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SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010

Table 2-20. VPBE Terminal Functions (continued)

SIGNAL

OTHER(2)

TYPE(1)

DESCRIPTION

(3)

NAME

NO.

GPIO3/

This pin is multiplexed between GPIO, and the VPBE.

B0/

C14

I/O/Z

DVDD18

In VPBE mode, it is RGB888 Blue data bit 0 output B0 or LCD interlaced

LCD_FIELD

bidirectional LCD_FIELD.

GPIO4/

This pin is multiplexed between GPIO, the VPFE, and the VPBE.

R0/

B14

I/O/Z

DVDD18

In VPBE mode, it is RGB888 Red data bit 0 output R0.

C_FIELD

GPIO5/

This pin is multiplexed between GPIO and the VPBE.

E14

I/O/Z

DVDD18

In VPBE mode, it is RGB888 Green data bit 1 output G1.

GPIO6/

This pin is multiplexed between GPIO and the VPBE.

A14

I/O/Z

DVDD18

In VPBE mode, it is RGB888 Blue data bit 1 output B1.

GPIO38/

This pin is multiplexed between VPBE and GPIO.

D14

I/O/Z

DVDD18

In VPBE mode, it is RGB888 Red output data bit 1.

PWM1/

This pin is multiplexed between PWM1, VPBE, and GPIO.

R2/

B15

I/O/Z

DVDD18

In VPBE mode, it is RGB888 Red output bit 2 (R2).

GPIO46

PWM2/

This pin is multiplexed between PWM2, VPBE, and GPIO.

B2/

A15

I/O/Z

DVDD18

In VPBE mode, it is RGB888 Blue output bit 2 (B2).

GPIO47

Table 2-21. DAC [Part of VPBE] Terminal Functions

SIGNAL

TYPE(1)

OTHER(2) (3)

DESCRIPTION

NAME

NO.

DAC[A:D]

Reference voltage input (0.5 V). When the DAC is not used, the DAC_VREF signal

DAC_VREF

R17

A I

(3)

should be connected to VSS.

Output of DAC A. When the DAC is not used, the DAC_IOUT_A signal should be

DAC_IOUT_A

P19

A O

left as a No Connect.

Output of DAC B. When the DAC is not used, the DAC_IOUT_B signal should be

DAC_IOUT_B

P18

A O

left as a No Connect.

Output of DAC C. When the DAC is not used, the DAC_IOUT_C signal should be

DAC_IOUT_C

R19

A O

left as a No Connect.

Output of DAC D. When the DAC is not used, the DAC_IOUT_D signal should be

DAC_IOUT_D

T19

A O

left as a No Connect.

1.8-V analog I/O power. When the DAC is not used, the VDDA_1P8V signal should be

VDDA_1P8V

R18

(3)

connected to VSS.

Analog I/O ground. When the DAC is not used, the VSSA_1P8V signal should be

VSSA_1P8V

P17

GND

(3)

connected to VSS.

1.20-V analog core supply voltage (A-513, -594, -810 devices). When the DAC is

VDDA_1P1V

P16

(3)

not used, the VDDA_1P1V signal should be connected to VSS.

Analog core ground. When the DAC is not used, the VSSA_1P1V signal should be

VSSA_1P1V

T18

GND

(3)

connected to VSS.

External resistor connection for current bias configuration. This pin must be

DAC_RBIAS

R16

A I

(3)

connected via a 4-k

Ω resistor to VSSA_1P8V. When the DAC is not used, the

DAC_RBIAS signal should be connected to VSS.

(1)

I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal

(2)

Specifies the operating I/O supply voltage for each signal

(3)

For more information, see Section 5.2, Recommended Operating Conditions.

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