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TNETV6446AINZWT 数据表(PDF) 87 Page - Texas Instruments |
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TNETV6446AINZWT 数据表(HTML) 87 Page - Texas Instruments |
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87 / 227 page  TMS320DM6446 www.ti.com SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010 5.3 Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating Case Temperature (Unless Otherwise Noted) PARAMETER TEST CONDITIONS (1) MIN TYP MAX UNIT Low/full speed: 2.8 USB_VDDAP3 V USB_DN and USB_DP High speed: 360 440 mV VOH USB_DN and USB_DP High-level output voltage (3.3V I/O) DVDD33 = MIN, IOH = MAX 2.4 V High-level output voltage (1.8V I/O) DVDD18 = MIN, IOH = MAX DVDD - 0.45 V Low/full speed: 0.0 0.3 V USB_DN and USB_DP High speed: -10 10 mV VOL USB_DN and USB_DP Low-level output voltage (3.3V I/O) DVDD33 = MIN, IOL = MAX 0.4 V Low-level output voltage (1.8V I/O) DVDD18 = MIN, IOL = MAX 0.45 V VI = VSS to DVDD without opposing ±10 mA internal resistor VI = VSS to DVDD with opposing internal II (2) Input current 50 100 250 mA pullup resistor (3) VI = VSS to DVDD with opposing internal -250 -100 -50 mA pulldown resistor (3) IOH High-level output current All peripherals -4 mA IOL Low-level output current All peripherals 4 mA VO = DVDD or VSS; internal pull disabled ±20 mA IOZ (4) I/O Off-state output current VO = DVDD or VSS; internal pull enabled ±100 mA Core (CVDD, VDDA1P1V, USB_VDDA1P2LDO (5), ICDD CVDD = 1.2 V, DSP clock = 594 MHz 767 mA CVDDDSP) supply current (6) 3.3V I/O (DVDD33, USB_VDDA3P3) IDDD DVDD = 3.3 V, DSP clock = 594 MHz 6 mA supply current(6) 1.8V I/O (DVDD18, DVDDR2, DDR_VDDDLL, IDDD PLLVDD18, VDDA1P8V, USB_VDD1P8, MXVDD, DVDD = 1.8 V, DSP clock = 594 MHz 102 mA M24VDD) supply current(6) CI Input capacitance 4 pF Co Output capacitance 4 pF (1) For test conditions shown as MIN, MAX, or NOM, use the appropriate value specified in Section 5.2, Recommended Operating Conditions. (2) II applies to input-only pins and bi-directional pins. For input-only pins, II indicates the input leakage current. For bi-directional pins, II indicates the input leakage current and off-state (Hi-Z) output leakage current. (3) Applies only to pins with an internal pullup (IPU) or pulldown (IPD) resistor. (4) IOZ applies to output-only pins, indicating off-state (Hi-Z) output leakage current. (5) This pin is an internal LDO output and connected via 1 mF capacitor to USB_VSSA1P2LDO. (6) Measured under the following conditions: 60% DSP CPU utilization; ARM doing typical activity (peripheral configurations, other housekeeping activities); DDR2 Memory Controller at 50% utilization (135 MHz), 50% writes, 32 bits, 50% bit switching; 2 MHz ASP at 100% utilization; Timer0 at 100% utilization. At room temperature (25°C) for typical process devices. The actual current draw varies across manufacturing processes and is highly application-dependent. For more details on core and I/O voltages, activities and typical currents for -594, A-513, and -810 devcies, as well as information relevant to board power supply design, see the TMS320DM6446/3 Power Consumption Summary application report (literature number SPRAAD6). Copyright © 2005–2010, Texas Instruments Incorporated Device Operating Conditions 87 Submit Documentation Feedback Product Folder Link(s): TMS320DM6446 |
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