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TNETV6446AINZWT 数据表(PDF) 92 Page - Texas Instruments |
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TNETV6446AINZWT 数据表(HTML) 92 Page - Texas Instruments |
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92 / 227 page  TMS320DM6446 SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010 www.ti.com Table 6-3. DM6446 Power and Clock Domains POWER DOMAIN CLOCK DOMAIN PERIPHERAL/MODULE Always On CLKIN UART0 Always On CLKIN UART1 Always On CLKIN UART2 Always On CLKIN I2C Always On CLKIN Timer0 Always On CLKIN Timer1 Always On CLKIN Timer2 Always On CLKIN PWM0 Always On CLKIN PWM1 Always On CLKIN PWM2 Always On CLKDIV2 ARM Subsystem Always On CLKDIV3 DDR2 Always On CLKDIV3 VPSS Always On CLKDIV3 EDMA3 Always On CLKDIV3 SCR Always On CLKDIV6 GPSC Always On CLKDIV6 LPSCs Always On CLKDIV6 Ice Pick Always On CLKDIV6 EMIFA Always On CLKDIV6 USB Always On CLKDIV6 HPI Always On CLKDIV6 VLYNQ Always On CLKDIV6 EMAC Always On CLKDIV6 ATA/CF Always On CLKDIV6 MMC/SD/SDIO Always On CLKDIV6 SPI Always On CLKDIV6 ASP Always On CLKDIV6 GPIO DSP CLKDIV1 C64x+ CPU Table 6-4. DM6446 Clock Domains(1) CLOCK MODES (FREQUENCY) FIXED SUBSYSTEM RATIO PLL ENABLED PLL ENABLED PLL ENABLED PLL BYPASS vs. PLL1 ( A-513) ( -594) (-810) PLL1 – 27 MHz 513 MHz 594 MHz 810 MHz DSP 1:1 27 MHz 513 MHz 594 MHz 810 MHz ARM 1:2 13.5 MHz 256.5 MHz 297 MHz 405 MHz EDMA3/VPSS 1:3 9 MHz 171 MHz 198 MHz 270 MHz Peripherals 1:6 4.5 MHz 85.5 MHz 99 MHz 135 MHz (1) These table values assume a MXI/CLKIN of 27 MHz and a PLL1 multiplier equal to 22 for both A-513 and -594 devices. For -810 device, these table values assume a MXI/CLKIN of 27 MHz and a PLL1 multiplier equal to 30. 92 Peripheral and Electrical Specifications Copyright © 2005–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM6446 |
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