TNETV6446AINZWT datasheet(49/227 Pages) TI1

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TMS320DM6446

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SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010

Table 2-25. MMC/SD/SDIO Terminal Functions

SIGNAL

TYPE(1)

OTHER(2)

DESCRIPTION

NAME

NO.

MMC/SD/SDIO

SD_CLK

DVDD33

Data clock output SD_CLK

SD_CMD

I/O/Z

DVDD33

Bi-directional command IO SD_CMD

SD_DATA3

I/O/Z

SD_DATA2

I/O/Z

DVDD33

These pins are the nibble-wide bi-directional data bus SD_DATA[3:0].

SD_DATA1

I/O/Z

SD_DATA0

I/O/Z

(1)

I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal

(2)

Specifies the operating I/O supply voltage for each signal

Table 2-26. HPI Terminal Functions

SIGNAL

TYPE(1)

OTHER(2) (3)

DESCRIPTION

NAME

NO.

Host-Port Interface (HPI)

For EMIFA, this pin is Chip Select 3 output.

EM_CS3

I/O/Z

DVDD18

In HPI mode this pin must be pulled high via an external 10-k

Ω resistor.

EM_BA[0]/

This pin is multiplexed between EMIFA, ATA/CF, and HPI.

DA0/

I/O/Z

DVDD18

In HPI mode, it is the host interrupt output HINT.

HINT

EM_A[0]/

This pin is multiplexed between EMIFA, ATA/CF, HPI, and GPIO.

DA2/

For HPI, it is control input HCNTL1. The state of HCNTL1 and HCNTL0 determine

I/O/Z

DVDD18

HCNTL1/

if address, data, or control information is being transmitted between an external

GPIO53

host and DM644X.

This pin is multiplexed between EMIFA (NAND/SmartMedia/xD), and HPI.

EM_A[2]/

In HPI mode, it is control input HCNTL0. The state of HCNTL1 and HCNTL0

(CLE)/

I/O/Z

DVDD18

determine if address, data, or control information is being transmitted between an

HCNTL0

external host and DM644X.

EM_A[1]/

This pin is multiplexed between EMIFA (NAND/SmartMedia/xD), and HPI.

(ALE)/

I/O/Z

DVDD18

In HPI mode, it is Half-word identification input HHWIL.

HHWIL

EM_R/W/

This pin is multiplexed between EMIFA, ATA/CF, and HPI.

INTRQ/

I/O/Z

DVDD18

For HPI, it is the Host Read Write input HR/W. This signal is active high for reads

HR/W

and low for writes.

EM_CS2/

This pin is multiplexed between EMIFA and HPI.

I/O/Z

DVDD18

HCS

In HPI mode, this pin is HPI Active Low Chip Select input HCS.

EM_WE

(WE)

This pin is multiplexed between EMIFA (NAND/SmartMedia/xD), ATA/CF, and HPI.

(IOWR)/

I/O/Z

DVDD18

For HPI, it is data strobe 2 input HDS2.

DIOW/

HDS2

EM_OE/

(RE)/

This pin is multiplexed between EMIFA (NAND/SmartMedia/xD), ATA/CF, and HPI.

(IORD)/

I/O/Z

DVDD18

For HPI, it is data strobe 1 input HDS1.

DIOR/

HDS1

EM_WAIT/

(RDY/BSY)/

IPU

This pin is multiplexed between EMIFA (NAND/SmartMedia/xD), ATA/CF, and HPI.

I/O/Z

IORDY/

DVDD18

For HPI, it is ready output HRDY.

HRDY

(1)

IPD = Internal pulldown, IPU = Internal pullup. (To pull up a signal to the opposite supply rail, a 1-k

Ω resistor should be used.)

(2)

I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal

(3)

Specifies the operating I/O supply voltage for each signal

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