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TNETV6446AINZWT 数据表(PDF) 64 Page - Texas Instruments |
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TNETV6446AINZWT 数据表(HTML) 64 Page - Texas Instruments |
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64 / 227 page  TMS320DM6446 SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010 www.ti.com 3.3.1.2 DSPBOOTADDR Register Description The DSPBOOTADDR register contains the upper 22 bits of the C64x+ DSP reset vector. The register format is shown in Figure 3-4 and bit field descriptions are shown in Table 3-5. DSPBOOTADDR is readable and writable by software after reset. Figure 3-4. DSPBOOTADDR Register 31 10 9 0 BOOTADDR[21:0] RESERVED R- 0100 0010 0010 0000 0000 00 R-00 0000 0000 LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 3-5. DSPBOOTADDR Register Description NAME DESCRIPTION BOOTADDR[21:0] Upper 22 bits of the C64x+ DSP boot address. 3.3.2 ARM Boot The DM6446 ARM can boot from EMIFA, internal ROM (NAND, SPI), UART0, or HPI, as determined by the setting of the BTSEL[1:0] pins. The BTSEL[1:0] pins are read by the ARM ROM Boot Loader (RBL) to further define the ROM boot mode. The ARM boot modes are summarized in Table 3-6. Table 3-6. ARM Boot Modes BTSEL1 BTSEL0 BOOT MODE ARM RESET BRIEF DESCRIPTION VECTOR 0 0 ARM NAND, SPI RBL 0x0000 4000 Up to 14 K-bytes secondary boot loader through NAND with up to 2 K-bytes page sizes. 0 1 ARM EMIFA External Boot 0x0200 0000 EMIFA EM_CS2 external memory space. 1 0 ARM HPI RBL 0x0000 4000 Up to 14 K-btyes secondary boot loader through an external host. 1 1 ARM UART RBL 0x0000 4000 Up to 14 K-bytes secondary boot loader through UART0. When the BTSEL[1:0] pins are set to the ARM EMIFA External Boot ("01"), the ARM immediately begins executing code from the EMIFA EM_CS2 memory space (0x0200 0000). When the BTSEL[1:0] pins indicate a condition other than the ARM EMIFA External Boot (!01), the RBL begins execution. ARM NAND/SPI Boot mode has the following features: • Loads a secondary User Boot Loader (UBL) from NAND/SPI flash to ARM Internal RAM (AIM) and transfers control to the user software. • Support for NAND with page sizes up to 8192 bytes. • Support for error correction when loading UBL • Support for up to 14KB UBL • Optional, user selectable, support for use of DMA, I-cache, and PLL enable while loading UBL ARM UART Boot mode has the following features: • Loads a secondary UBL via UART0 to AIM and transfers control to the user software. • Support for up to 14KB UBL ARM HPI Boot Mode has the following features: • No support for a full firmware boot. Instead, waits for external host to load a secondary UBL via HPI to AIM and transfers control to the user software. • Support for up to 14KB UBL. For further details on the ROM Bootloader, see the TMS320DM644x DMSoC ARM Subsystem Reference Guide (literature number SPRUE14). 64 Device Configurations Copyright © 2005–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM6446 |
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