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TNETV6446AINZWT 数据表(PDF) 79 Page - Texas Instruments |
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TNETV6446AINZWT 数据表(HTML) 79 Page - Texas Instruments |
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79 / 227 page  TMS320DM6446 www.ti.com SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010 3.5.6.6 Timer0 Input, CLK_OUT1, and GPIO Pin Multiplexing The multiplexing of the CLK_OUT1 and Timer0 Input (Timer 0 only) functions is shown in Table 3-25. Table 3-25. Timer0 Input, CLK_OUT1, and GPIO Pin Multiplexing PINMUX1 REGISTER BIT FIELDS MULTIPLEXED PINS CLK_OUT1/ TIMIN CLK1 TIM_IN/ GPIO[49] 0 0 GPIO[49] 0 1 CLK_OUT1 1 - TIM_IN 3.5.6.7 ASP, SPI, I2C, ATA, and GPIO Pin Multiplexing When the ASP, SPI, or I2C serial port functions are not selected, their pins may be used as GPIOs as seen in Table 3-26, Table 3-27, and Table 3-28. The SPI_EN1 pin can also function as the HDDIR buffer control when ATAEN is selected and the HDIREN bit is set. Table 3-26. ASP and GPIO Pin Multiplexing PINMUX1 REGISTER BIT FIELD MULTIPLEXED PINS CLKX/ CLKR/ FSX/ FSR/ DX/ DR/ ASP GPIO[29] GPIO[30] GPIO[31] GPIO[32] GPIO[33] GPIO[34] 0 GPIO[29] GPIO[30] GPIO[31] GPIO[32] GPIO[33] GPIO[34] 1 CLKX CLKR FSX FSR DX DR Table 3-27. SPI and GPIO Pin Multiplexing PINMUX0 AND PINMUX1 REGISTER BIT FIELDS MULTIPLEXED PINS SP_EN1/ SPI_DO/ SPI_DI/ SPI_CLK/ SPI_EN0/ SPI ATAEN HDIREN HDDIR/ GPIO[41] GPIO[40] GPIO[39] GPIO[37] GPIO[42] 0 0 0 GPIO[42] GPIO[41] GPIO[40] GPIO[39] GPIO[37] 0 0 1 Driven Low GPIO[41] GPIO[40] GPIO[39] GPIO[37] 0 1 0 GPIO[42] GPIO[41] GPIO[40] GPIO[39] GPIO[37] 0 1 1 HDDIR GPIO[41] GPIO[40] GPIO[39] GPIO[37] 1 0 0 SP_EN1 SPI_DO SPI_DI SPI_CLK SPI_EN0 1 0 1 Driven Low SPI_DO SPI_DI SPI_CLK SPI_EN0 1 1 0 SP_EN1 SPI_DO SPI_DI SPI_CLK SPI_EN0 1 1 1 HDDIR SPI_DO SPI_DI SPI_CLK SPI_EN0 Table 3-28. I2C and GPIO Pin Multiplexing PINMUX1 REGISTER MULTIPLEXED PINS BIT FIELD I2C_CLK/ I2C_DATA/ I2C GPIO[43] GPIO[44] 0 GPIO[43] GPIO[44] 1 I2C_CLK I2C_DATA Copyright © 2005–2010, Texas Instruments Incorporated Device Configurations 79 Submit Documentation Feedback Product Folder Link(s): TMS320DM6446 |
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