TNETV6446AINZWT datasheet(99/227 Pages) TI1

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DDR2 Z Group:

DDR_DQS[3:0], DDR_D[12:0]

High Group:

DMACK/UART_TXD1, EM_A[2]/(CLE), EM_A[1]/(ALE),

)/(

EM_CS3 EM_WE WE

IOWR DIOW

Low Group:

DMARQ/UART_RXD1, VCLK, RTCK, TDO, VPBECLK, YOUT0/G5/AEAW0, YOUT1/G6/AEAW1,

YOUT2/G7/AEAW2, YOUT3/R3/AEAW3, YOUT4/R4/AEAW4, COUT3/B6/DSP_BT,

COUT2/B5/EM_WIDTH, COUT1/B4/BTSEL1, COUT0/B3/BTSEL0, TRST

DDR2 Low/High Group:

DDR_BS[2:0]

DDR2 Z/High Group:

DDR_DQM[3:0]

DDR2 High Group:

DDR_CLK0 DDR_CS DDR_WE DDR_RAS DDR_CAS

DDR2 Low Group:

DDR_CLK0, DDR_CKE, DDR_A[12:0]

Z/Invalid Group:

EM_D[15:0]

Low/High Group:

EM_R/

/INTRQ

High/Low Group:

EM_BA[0]/DA0,

)/(

EM_CS2 EM_OE RE

IORD DIOR

Z Group:

All other pins not listed above, with the exception of power and ground pins.

•

The following Z Group pins have an internal pullup (IPU): DMARQ/UART_RXD1, VPBECLK,

HSYNC, VSYNC,

, YI/CCD[7:0], CI[3:0]/CCD[11:8], CI4/CCD12/UART_RTS2,

CI5/CCD13/UART_CTS2, CI6/CCD14/UART_TXD2, CI7/CCD15/UART_RXD2

TRST

•

The following Z Group pins have an internal pulldown (IPD): EM_WAIT/

, TCK, TDI, TMS, EMU[1:0]

IORDY

RESET

Boot

Configuration Pins

DDR2 Low Group

(A)

DDR2 Z Group

(A)

DDR2 High Group

(A)

DDR2 Low/High Group

(A)

DDR2 Z/High Group

(A)

Low Group

(A)

Z Group

(A)

High Group

(A)

High/Low Group

(A)

Low/High Group

(A)

Z/Invalid Group

(A)

TMS320DM6446

www.ti.com

SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010

Figure 6-9. Reset Timing

Peripheral and Electrical Specifications

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Product Folder Link(s): TMS320DM6446

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