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ST7LITE49K2 数据表(PDF) 62 Page - STMicroelectronics |
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ST7LITE49K2 数据表(HTML) 62 Page - STMicroelectronics |
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62 / 245 page  Interrupts ST7LITE49K2 62/245 8.5.3 External interrupt control register (EICR) Reset value: 0000 0000 (00h) Bits 7:6 = Reserved, must be kept cleared. Bits 5:4 = IS2[1:0] ei2 sensitivity bits These bits define the interrupt sensitivity for ei2 (Port C) according to Table 19. Bits 3:2 = IS1[1:0] ei1 sensitivity bits These bits define the interrupt sensitivity for ei1 (Port B) according to Table 19. Bits 1:0 = IS0[1:0] ei0 sensitivity bits These bits define the interrupt sensitivity for ei0 (Port A) according to Table 19. Note: 1 These 8 bits can be written only when the I bit in the CC register is set. 2 Changing the sensitivity of a particular external interrupt clears this pending interrupt. This can be used to clear unwanted pending interrupts. Refer to Section : External interrupt function. 7 0 0 0 IS21 IS20 IS11 IS10 IS01 IS00 Read/write Table 19. Interrupt sensitivity bits ISx1 ISx0 External interrupt sensitivity 0 0 Falling edge & low level 0 1 Rising edge only 1 0 Falling edge only 1 1 Rising and falling edge |
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