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ST7LITE49K2 数据表(PDF) 77 Page - STMicroelectronics |
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ST7LITE49K2 数据表(HTML) 77 Page - STMicroelectronics |
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77 / 245 page  ST7LITE49K2 I/O ports 77/245 Table 24. I/O port mode options (1) 1. Off means implemented not activated, On means implemented and activated. Configuration mode Pull-Up P-Buffer Diodes to VDD to VSS Input Floating with/without Interrupt Off Off On On Pull-up with Interrupt On Output Push-pull Off On Open Drain (logic level) Off Table 25. I/O port configuration Hardware configuration 1. When the I/O port is in input configuration and the associated alternate function is enabled as an output, reading the DR register will read the alternate function output status. 2. When the I/O port is in output configuration and the associated alternate function is enabled as an input, the alternate function reads the pin status given by the DR register content. CONDITION PAD EXTERNAL INTERRUPT POLARITY DATA BUS INTERRUPT DR REGISTER ACCESS W R FROM OTHER PINS SOURCE (eix) SELECTION DR REGISTER ALTERNATE INPUT ANALOG INPUT To on-chip peripheral COMBINATIONAL LOGIC PAD DATA BUS DR DR REGISTER ACCESS R/W REGISTER PAD DATA BUS DR DR REGISTER ACCESS R/W ALTERNATE ALTERNATE ENABLE OUTPUT REGISTER BIT From on-chip periphera l |
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