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ST7LITE49K2 数据表(PDF) 24 Page - STMicroelectronics |
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ST7LITE49K2 数据表(HTML) 24 Page - STMicroelectronics |
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24 / 245 page  Register and memory mapping ST7LITE49K2 24/245 Figure 4. ST7LITE49K2 memory map 1. Refer to Table 3 for information on hardware registers mapping, and to Table 16 for interrupt vectors addresses. 2. Refer to Section 7.1.1: Internal RC oscillator for details on internal RC oscillator calibration. 1. Legend: x=undefined, R/W=read/write. 2. For a description of the Debug Module registers, see ICC protocol reference manual. 0000h Flash Memory Interrupt & Reset Vectors(1) HW registers(1) 0080h 007Fh FFE0h FFFFh Reserved Short Addressing RAM (zero page) 0080h 00FFh E000h DFFFh FFDFh 128 bytes Stack 0100h 017Fh 8 Kbytes DEE0h RCCRH1 RCCRL1 01FFh 0200h RAM RAM (384 bytes) 0180h 01FFh DEE1h DEE2h RCCRH0 RCCRL0 DEE3h E000h (8 Kbytes) Flash program memory (4 Kbytes) Sector 0 FFFFh (4 Kbytes) Sector 1 EFFFh F000h 1000h 10FFh Data EEPROM (256 bytes) 1100h Reserved 0FFFh |
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