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ST7LITE49K2 数据表(PDF) 94 Page - STMicroelectronics

部件名 ST7LITE49K2
功能描述  Communication interfaces
PDF  245 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7LITE49K2 数据表(HTML) 94 Page - STMicroelectronics

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ST7LITE49K2
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Now pulse width P between first capture and second capture is given by:
where N is the number of overflows of 12-bit CNTR1.
Figure 48.
Long range input capture timing diagram
P
decimal
F9
LT1
–
LT2
1
++
()
×
0.004ms
×
decimal FFF
N
×
() N ATICR2 ATICR1
–
1
–
++
() 1ms
×
+
=
F9h
00h
LT1
F9h
00h
LT2
ATH1 & ATL1
00h
0h
LT1
ATH1
LT2
ATH2
fOSC/32
TB Counter1
CNTR1
LTIC
LTICR
ATICRH
00h
ATL1
ATL2
ATICRL
ATICR = ATICRH[3:0] & ATICRL[7:0]
_ _ _
_ _ _
_ _ _
_ _ _
_ _ _
_ _ _
ATH2 & ATL2
_ _ _



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