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ST7LITE49K2 数据表(PDF) 22 Page - STMicroelectronics |
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ST7LITE49K2 数据表(HTML) 22 Page - STMicroelectronics |
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22 / 245 page  Register and memory mapping ST7LITE49K2 22/245 0011h 0012h 0013h 0014h 0015h 0016h 0017h 0018h 0019h 001Ah 001Bh 001Ch 001Dh 001Eh 001Fh 0020h 0021h 0022h 0023h 0024h 0025h 0026h 0027h 0028h 0029h 002Ah AUTO- RELOAD TIMER ATCSR CNTR1H CNTR1L ATR1H ATR1L PWMCR PWM0CSR PWM1CSR PWM2CSR PWM3CSR DCR0H DCR0L DCR1H DCR1L DCR2H DCR2L DCR3H DCR3L ATICRH ATICRL ATCSR2 BREAKCR1 ATR2H ATR2L DTGR BREAKEN Timer Control/Status register Counter register 1 High Counter register 1 Low Auto-Reload register 1 High Auto-Reload register 1 Low PWM Output Control register PWM 0 Control/Status register PWM 1 Control/Status register PWM 2 Control/Status register PWM 3 Control/Status register PWM 0 Duty Cycle register High PWM 0 Duty Cycle register Low PWM 1 Duty Cycle register High PWM 1 Duty Cycle register Low PWM 2 Duty Cycle register High PWM 2 Duty Cycle register Low PWM 3 Duty Cycle register High PWM 3 Duty Cycle register Low Input Capture register High Input Capture register Low Timer Control/Status register 2 Break Control register 1 Auto-Reload register 2 High Auto-Reload register 2 Low Dead Time Generation register Break Enable register 0x00 0000b 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 03h 00h 00h 00h 00h 03h R/W Read Only Read Only R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Read Only Read Only R/W R/W R/W R/W R/W R/W 002Bh Reserved area (1 byte) 002Ch AUTO- RELOAD TIMER BREAKCR2 Break Control register 2 00h R/W 002Dh 002Eh 002Fh 0030h 0031h ITC ISPR0 ISPR1 ISPR2 ISPR3 EICR Interrupt Software Priority register 0 Interrupt Software Priority register 1 Interrupt Software Priority register 2 Interrupt Software Priority register 3 External Interrupt Control register FFh FFh FFh FFh 00h R/W R/W R/W R/W R/W 0032h Reserved area (1 byte) 0033h WDG WDGCR Watchdog Control register 7Fh R/W 0034h FLASH FCSR Flash Control/Status register 00h R/W 0035h EEPROM EECSR Data EEPROM Control/Status register 00h R/W 0036h 0037h 0038h ADC ADCCSR ADCDRH ADCDRL A/D Control Status register A/D Data register High A/D Amplifier Control/Data Low Register 00h xxh 0xh R/W Read Only R/W 0039h Reserved area (1 byte) 003Ah MCC MCCSR Main Clock Control/Status register 00h R/W Table 3. Hardware register map(1) (continued) Address Block Register label Register name Reset status Remarks |
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