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ST7LITE49K2 数据表(PDF) 18 Page - STMicroelectronics |
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ST7LITE49K2 数据表(HTML) 18 Page - STMicroelectronics |
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18 / 245 page ![]() Pin description ST7LITE49K2 18/245 Legend / Abbreviations for Table 2: Type: I = input, O = output, S = supply In/Output level: CT = CMOS 0.3VDD/0.7VDD with input trigger Output level: HS = 20 mA high sink (on N-buffer only) Port and control configuration: ● Input: float = floating, wpu = weak pull-up, int = interrupt, ana = analog ● Output: OD = open drain, PP = push-pull The RESET configuration of each pin is shown in bold which is valid as long as the device is in reset state. Table 2. ST7LITE49K2 device pin description Pin number Pin name Level Port/control Main function (after reset) Alternate function Input Output 1 5 PA3(HS)/ATPWM1 I/O CT HS x ei0 xx Port A3 (HS) ATPWM1 26 PA4(HS)/ ATPWM2/MCO I/O CT HS x xx Port A4 (HS) ATPWM2/MC O 3 7 PA5 (HS)ATPWM3 I/O CT HS x xx Port A5 (HS) ATPWM3 48 PA6(HS)/ I2CDATA I/O CT HS x ei0 T Port A6 (HS) I2CDATA 5 9 PA7(HS)/I2CCLK I/O CT HS x T Port A7 (HS) I2CCLK 6 10 RESET x xReset 812 VDD (2) S Digital Supply Voltage 913 VSS (2) S Digital Ground Voltage 10 14 OSC1/CLKIN I Resonator oscillator inverter input or External clock input 11 15 OSC2 O Resonator oscillator output 12 16 VSSA (2) S Analog Ground Voltage 13 17 VDDA (2) S Analog Supply Voltage |
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