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ST7LITE49K2 数据表(PDF) 41 Page - STMicroelectronics

部件名 ST7LITE49K2
功能描述  Communication interfaces
PDF  245 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7LITE49K2 数据表(HTML) 41 Page - STMicroelectronics

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ST7LITE49K2
Supply, reset and clock management
41/245
Figure 13.
Clock management block diagram
CR6
CR9
CR2
CR3
CR4
CR5
CR8
CR7
fOSC
MCCSR
SMS
MCO
MCO
fCPU
fCPU
TO CPU AND
PERIPHERALS
(1ms timebase @ 8 MHz fOSC)
/32 DIVIDER
fOSC
fOSC/32
fOSC
fLTIMER
1
0
LITE TIMER 2 COUNTER
8-BIT
AT TIMER 2
12-BIT
CLKIN
OSC2
CLKIN
Tunable
Oscillator
RC
/2
DIVIDER
Option bits
CLKSEL[1:0]
OSC
1-16 MHz
CLKIN
CLKIN
/OSC1
OSC
/2
DIVIDER
OSC/2
CLKIN/2
CLKIN/2
Option bits
CLKSEL[1:0]
CR1
CR0
or 32 kHz
CKCNTCSR
RC/AWU
Clock controller
fCPU
AWU RC OSC
8 MHz
2 MHz
1 MHz
4 MHz
Prescaler
8 MHz (fRC)
RC OSC
500 kHz
CK2
CK1
CK0
AVDTHCR
RCCR
SICSR
PLL
8 MHz --> 32 MHz



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