ST7LITE49K2 datasheet(39/245 Pages) STMICROELECTRONICS

39 / 245 page

ST7LITE49K2

Supply, reset and clock management

39/245

In 38-pulse ICC mode, the internal RC oscillator is forced as a clock source, regardless of

the selection in the option byte.

Section 13: Electrical characteristics on page 192 for more information on the frequency

and accuracy of the RC oscillator.

To improve clock stability and frequency accuracy, it is recommended to place a decoupling

capacitor, typically 100 nF, between the VDD and VSS pins and also between the VDDA and

VSSA pins as close as possible to the ST7 device.

These bytes are systematically programmed by ST, including on FASTROM devices.

Caution:

If the voltage or temperature conditions change in the application, the frequency may need

to be recalibrated. Refer to application note AN1324 for information on how to calibrate the

RC frequency using an external reference signal.

7.1.2

Auto-wakeup RC oscillator

The ST7LITE49K2 also contains an Auto-wakeup RC oscillator. This RC oscillator should be

enabled to enter Auto-wakeup from halt mode.

The Auto-wakeup (AWU) RC oscillator can also be configured as the startup clock through

the CKSEL[1:0] option bits (see Section 14.1: Option bytes on page 230).

This is recommended for applications where very low power consumption is required.

Switching from one startup clock to another can be done in run mode as follows (see

Figure 12):

Case 1 Switching from internal RC to AWU

Set the RC/AWU bit in the CKCNTCSR register to enable the AWU RC oscillator

The RC_FLAG is cleared and the clock output is at 1.

Wait 3 AWU RC cycles till the AWU_FLAG is set

The switch to the AWU clock is made at the positive edge of the AWU clock signal

Once the switch is made, the internal RC is stopped

Case 2 Switching from AWU RC to internal RC

Reset the RC/AWU bit to enable the internal RC oscillator

Using a 4-bit counter, wait until 8 internal RC cycles have elapsed. The counter is

running on internal RC clock.

Wait till the AWU_FLAG is cleared (1AWU RC cycle) and the RC_FLAG is set (2 RC

cycles)

The switch to the internal RC clock is made at the positive edge of the internal RC clock

signal

Once the switch is made, the AWU RC is stopped

The DEE0h, DEE1h, DEE2h and DEE3h addresses are located in a reserved area in non-volatile memory.

They are read-only bytes for the application code. This area cannot be erased or programmed by any ICC

operations.

For compatibility reasons with the SICSR register, CR[1:0] bits are stored in the 5th and 6th position of

DEE1 and DEE3 addresses.

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