ST7LITE49K2 datasheet(92/245 Pages) STMICROELECTRONICS

92 / 245 page

On-chip peripherals

ST7LITE49K2

92/245

Figure 45.

Block diagram of input capture mode

Figure 46.

Input capture timing diagram

Long range input capture

Pulses that last more than 8 µs can be measured with an accuracy of 4 µs if fOSC equals 8

MHz in the following conditions:

●

The 12-bit AT4 timer is clocked by the Lite timer (RTC pulse: CK[1:0] = 01 in the ATCSR

●

The ICS bit in the ATCSR2 register is set so that the LTIC pin is used to trigger the AT4

timer capture.

●

The signal to be captured is connected to LTIC pin

●

Input Capture registers LTICR, ATICRH and ATICRL are read

This configuration allows to cascade the Lite timer and the 12-bit AT4 timer to get a 20-bit

input capture value. Refer to Figure 47.

ATCSR

CK0

CK1

ICIE

ICF

12-BIT AUTORELOAD REGISTER

12-BIT UPCOUNTER1

fCPU

ATIC

12-BIT INPUT CAPTURE REGISTER

IC INTERRUPT

REQUEST

ATR1

ATICR

CNTR1

(1 ms

fLTIMER

@ 8MHz)

timebase

OFF

32 MHz

COUNTER1

01h

fCOUNTER

xxh

02h

03h

04h

05h

06h

07h

04h

ATIC PIN

ICF FLAG

INTERRUPT

08h

09h

0Ah

INTERRUPT

ATICR READ

09h

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