ST7LITE49K2 datasheet(20/245 Pages) STMICROELECTRONICS

20 / 245 page

Pin description

ST7LITE49K2

20/245

PC4/LTIC/

COMPINB-

I/O

ei2

Port C4

LTIC/Analog

Comparator

External

Reference

Input B

PC5/COMPINB+/

BREAK2

I/O

Port C5

Analog

Comparator

Input B/

External

break 2

PC6/COMPINA+

I/O

ei2

Port C6

Analog

Comparator

Input A

PC7/BREAK1/

COMPOUTA

I/O

Port C7

BREAK1/Ana

log

Comparator

Output A

PA0 /COMPINA-

/OCMP1_A

I/O

ei0

Port A0

Analog

comparator

external

reference

Input A/

Timer A

Output

Compare 1

PA1(HS)/ATIC

I/O

Port A1

(HS)

ATIC

PA2(HS)/ATPWM0

I/O

Port A2

(HS)

ATPWM0

In the open-drain output column, T defines a true open-drain I/O (P-Buffer and protection diode to VDD are not

implemented).0

It is mandatory to connect all available VDD and VDDA pins to the supply voltage and all VSS and VSSA pins to ground.

Table 2.

ST7LITE49K2 device pin description

number

Pin name

Level

Port/control

Main

function

(after

reset)

Alternate

function

Input

Output

ST7LITE49K2 数据表(PDF) 20 Page - STMicroelectronics

ST7LITE49K2 数据表(HTML) 20 Page - STMicroelectronics

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ST7LITE49K2 数据表(PDF) 20 Page - STMicroelectronics

ST7LITE49K2 数据表(HTML) 20 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

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