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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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ST7LITE49K2 数据表(PDF) 80 Page - STMicroelectronics |
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ST7LITE49K2 数据表(HTML) 80 Page - STMicroelectronics |
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80 / 245 page  I/O ports ST7LITE49K2 80/245 open drain output 1 0 push-pull output 1 1 Table 31. Port configuration Port Pin name Input Output OR = 0 OR = 1 OR = 0 OR = 1 Port A PA5:0 floating pull-up interrupt open drain push-pull PA7:6 floating interrupt true open drain Port B PB7:0 floating pull-up interrupt open drain push-pull Port C PC7:4, PC2:0 floating pull-up interrupt open drain push-pull PC3 floating pull-up open drain push-pull Table 30. PC3 pin (continued) Mode DDR OR Table 32. I/O port register mapping and reset values Address (Hex.) Register label 765 43210 0000h PADR Reset Value MSB 000 0000 LSB 0 0001h PADDR Reset Value MSB 000 0000 LSB 0 0002h PAOR Reset Value MSB 000 0000 LSB 0 0003h PBDR Reset Value MSB 000 0000 LSB 0 0004h PBDDR Reset Value MSB 000 0000 LSB 0 0005h PBOR Reset Value MSB 000 0000 LSB 0 0006h PCDR Reset Value MSB 000 0000 LSB 0 0007h PCDDR Reset Value MSB 000 0000 LSB 0 0008h PCOR Reset Value MSB 000 0100 LSB 0 |
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