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ST7LITE49K2 数据表(PDF) 21 Page - STMicroelectronics |
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ST7LITE49K2 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 245 page  ST7LITE49K2 Register and memory mapping 21/245 3 Register and memory mapping As shown in Figure 4, the MCU is capable of addressing 64 Kbytes of memories and I/O registers. The available memory locations consist of 128 bytes of register locations, 384 bytes of RAM, 256 bytes of data EEPROM and 8 Kbytes of Flash program memory. The RAM space includes up to 128 bytes for the stack from 180h to 1FFh. The highest address bytes contain the user reset and interrupt vectors. The Flash memory contains two sectors (see ) mapped in the upper part of the ST7 addressing space so the reset and interrupt vectors are located in Sector 0 (FFE0h-FFFFh). The size of Flash Sector 0 and other device options are configurable by option bytes (refer to Section 14.1 on page 230). Caution: Memory locations marked as “Reserved” must never be accessed. Accessing a reserved area can have unpredictable effects on the device. Table 3. Hardware register map(1) Address Block Register label Register name Reset status Remarks 0000h 0001h 0002h Port A PADR PADDR PAOR Port A Data register Port A Data Direction register Port A Option register 00h 00h 00h R/W R/W R/W 0003h 0004h 0005h Port B PBDR PBDDR PBOR Port B Data register Port B Data Direction register Port B Option register 00h 00h 00h R/W R/W R/W 0006h 0007h 0008h Port C PCDR PCDDR PCOR Port C Data register Port C Data Direction register Port C Option register 00h 00h 08h R/W R/W R/W 0009h to 000Bh Reserved area (3 bytes) 000Ch 000Dh 000Eh 000Fh 0010h LITE TIMER LTCSR2 LTARR LTCNTR LTCSR1 LTICR Lite Timer Control/Status register 2 Lite Timer Auto-reload register Lite Timer Counter register Lite Timer Control/Status register 1 Lite Timer Input Capture register 0Fh 00h 00h 0x00 0000b xxh R/W R/W Read Only R/W Read Only |
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