ST7LITE49K2 datasheet(193/245 Pages) STMICROELECTRONICS

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ST7LITE49K2

Electrical characteristics

193/245

Figure 84.

Pin input voltage

13.2

Absolute maximum ratings

Stresses above those listed as “absolute maximum ratings” may cause permanent damage

to the device. This is a stress rating only and functional operation of the device under these

conditions is not implied. Exposure to maximum rating conditions for extended periods may

affect device reliability.

VIN

ST7 PIN

Table 69.

Voltage characteristics

Symbol

Ratings

Maximum value

Unit

VDD - VSS

Supply voltage

7.0

VIN

Input voltage on any pin(1)(2)

Directly connecting the RESET and I/O pins to VDD or VSS could damage the device if an unintentional

internal reset is generated or an unexpected change of the I/O configuration occurs (for example, due to a

corrupted Program Counter). To guarantee safe operation, this connection has to be done through a pull-

up or pull-down resistor (typical: 4.7 k

Ω for RESET, 10 kΩ for I/Os). Unused I/O pins must be tied in the

same way to VDD or VSS according to their reset configuration.

IINJ(PIN) must never be exceeded. This is implicitly insured if VIN maximum is respected. If VIN maximum

cannot be respected, the injection current must be limited externally to the IINJ(PIN) value. A positive

injection is induced by VIN>VDD while a negative injection is induced by VIN<VSS. For true open-drain

pads, there is no positive injection current, and the corresponding VIN maximum must always be respected

VSS-0.3 to VDD+0.3

VESD(HBM)

Electrostatic discharge voltage (Human Body

model)

see Section 13.8.3 on page

213

VESD(CDM)

Electrostatic discharge voltage (Charge Device

model)

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