 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
AD9544/PCBZ 数据表(PDF) 9 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9544/PCBZ 数据表(HTML) 9 Page - Analog Devices |
|
|
9 / 62 page  Data Sheet AD9544 Rev. 0 | Page 9 of 62 DISTRIBUTION CLOCK OUTPUTS Table 8. Parameter Min Typ Max Unit Test Conditions/Comments DIFFERENTIAL MODE All testing is both ac-coupled and dc-coupled Output Frequency Frequency range determined by driver functionality; actual frequency synthesis may be limited by the APLL VCO frequency range CML 1 500 × 106 Hz Terminated per Figure 33 HCSL 1 500 × 106 Hz Terminated per Figure 32 Differential Output Voltage Swing Voltage between output pins measured with output driver static; peak-to-peak differential output amplitude is twice that shown when driver is toggling and measured using a differential probe Output Current = 7.5 mA HCSL 312 368 402 mV Terminated per Figure 32 CML 257 348 408 mV Terminated to VDD (nominal 1.8 V) per Figure 33 Output Current = 15 mA HCSL 631 745 809 mV Terminated per Figure 32 CML 578 729 818 mV Terminated to VDD (nominal 1.8 V) per Figure 33 Common-Mode Output Voltage Output Current = 7.5 mA HCSL 155 184 201 mV Terminated per Figure 32 CML VDD − 208 VDD − 188 VDD − 169 mV Terminated to VDD (nominal 1.8 V) per Figure 33 (maximum common-mode voltage case occurs at the minimum amplitude) Output Current = 15 mA HCSL 316 372 405 mV Terminated per Figure 32 CML VDD − 416 VDD − 371 VDD − 327 mV Terminated to VDD (nominal 1.8 V) per Figure 33 (maximum common-mode voltage case occurs at the minimum amplitude) SINGLE-ENDED MODE Output Frequency 1 500 × 106 Hz Frequency range determined by driver functionality; actual frequency synthesis may be limited by the APLL VCO frequency range Output Current = 12 mA Voltage Swing (Peak-to-Peak) HCSL Driver Mode 509 584 634 mV Each output terminated per Figure 37 with RL = 50 Ω CML Driver Mode 456 565 644 mV Each output terminated per Figure 37 with RL = 50 Ω connected to VDD (nominal 1.8 V) instead of GND Voltage Swing Midpoint HCSL Driver Mode 255 292 317 mV Each output terminated per Figure 37 with RL = 50 Ω CML Driver Mode VDD − 325 VDD − 291 VDD − 266 mV Each output terminated per Figure 37 with RL = 50 Ω connected to VDD (nominal 1.8 V) instead of GND Output Current = 15 mA Voltage Swing (Peak-to-Peak) HCSL Driver Mode 645 734 796 mV Each output terminated per Figure 37 with RL = 50 Ω CML Driver Mode 589 721 815 mV Each output terminated per Figure 37 with RL = 50 Ω connected to VDD (nominal 1.8 V) instead of GND Voltage Swing Midpoint HCSL Driver Mode 322 367 398 mV Each output terminated per Figure 37 with RL = 50 Ω CML Driver Mode VDD − 411 VDD − 367 VDD − 334 mV Each output terminated per Figure 37 with RL = 50 Ω connected to VDD (nominal 1.8 V) instead of GND |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
