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AD9544/PCBZ 数据表(PDF) 16 Page - Analog Devices |
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AD9544/PCBZ 数据表(HTML) 16 Page - Analog Devices |
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16 / 62 page  AD9544 Data Sheet Rev. 0 | Page 16 of 62 Parameter Min Typ Max Unit Test Conditions/Comments Configuration 3—491.52 MHz Device configuration: fSYSCLK = 52 MHz XTAL, fCOMP = 19.2 MHz TCXO, BWCOMP = 50 Hz, fREF = 1 Hz, fVCO = 2949.12 MHz, fOUT = 491.52 MHz, BWDPLL = 50 mHz, phase buildout operation 10 Hz Offset −74 dBc/Hz 100 Hz Offset −89 dBc/Hz 1 kHz Offset −108 dBc/Hz 10 kHz Offset −119 dBc/Hz 100 kHz Offset −123 dBc/Hz 1 MHz Offset −134 dBc/Hz 10 MHz Offset −152 dBc/Hz Floor −159 Configuration 4—125 MHz Device configuration: fSYSCLK = 52 MHz XTAL, fCOMP = 19.2 MHz TCXO, BWCOMP = 50 Hz, fREF = 125 MHz, fVCO = 2500 MHz, fOUT = 125 MHz, BWDPLL = 0.1 Hz, phase buildout operation 10 Hz Offset −84 dBc/Hz 100 Hz Offset −106 dBc/Hz 1 kHz Offset −120 dBc/Hz 10 kHz Offset −131 dBc/Hz 100 kHz Offset −136 dBc/Hz 1 MHz Offset −147 dBc/Hz 10 MHz Offset −160 dBc/Hz Floor −163 dBc/Hz Configuration 5—312.5 MHz Device configuration: fSYSCLK = 52 MHz XTAL, fREF = 25 MHz, fVCO = 2500 MHz, fOUT = 312.5 MHz, BWDPLL = 50 Hz, phase buildout operation 10 Hz Offset −74 dBc/Hz 100 Hz Offset −91 dBc/Hz 1 kHz Offset −112 dBc/Hz 10 kHz Offset −123 dBc/Hz 100 kHz Offset −128 dBc/Hz 1 MHz Offset −138 dBc/Hz 10 MHz Offset −154 dBc/Hz Floor −161 dBc/Hz Configuration 6—174.7030837 MHz Device configuration: fSYSCLK = 52 MHz XTAL, fREF = 155.52 MHz, fVCO = 2620.5463 MHz, fOUT = (155.52 × 255/227) MHz, BWDPLL = 50 Hz 10 Hz Offset −82 dBc/Hz 100 Hz Offset −99 dBc/Hz 1 kHz Offset −117 dBc/Hz 10 kHz Offset −127 dBc/Hz 100 kHz Offset −133 dBc/Hz 1 MHz Offset −143 dBc/Hz 10 MHz Offset −157 dBc/Hz Floor −160 dBc/Hz |
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