AD9544SLASHPCBZ datasheet(18/62 Pages) AD

部件名	AD9544/PCBZ

功能描述	Quad Input, 10-Output, Dual DPLL, 1 pps Synchronizer and Jitter Cleaner

PDF	62 Pages

Scroll/Zoom	100%

制造商	AD [Analog Devices]

网页	http://www.analog.com

标志

18 / 62 page

AD9544

Data Sheet

Rev. 0 | Page 18 of 62

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

Configuration 5—312.5 MHz

Device configuration: fSYSCLK = 52 MHz XTAL, fREF = 25 MHz,

fVCO = 3750 MHz, fOUT = 312.5 MHz, BWDPLL = 50 Hz,

phase buildout operation

10 Hz Offset

−73

dBc/Hz

100 Hz Offset

−91

dBc/Hz

1 kHz Offset

−112

dBc/Hz

10 kHz Offset

−122

dBc/Hz

100 kHz Offset

−125

dBc/Hz

1 MHz Offset

−137

dBc/Hz

10 MHz Offset

−154

dBc/Hz

Floor

−161

dBc/Hz

Configuration 6—174.7030837 MHz

Device configuration: fSYSCLK = 52 MHz XTAL, fREF = 155.52 MHz,

fVCO = 3319.3586 MHz, fOUT = (155.52 × 255/227) MHz,

BWDPLL = 50 Hz

10 Hz Offset

−77

dBc/Hz

100 Hz Offset

−99

dBc/Hz

1 kHz Offset

−117

dBc/Hz

10 kHz Offset

−127

dBc/Hz

100 kHz Offset

−131

dBc/Hz

1 MHz Offset

−142

dBc/Hz

10 MHz Offset

−158

dBc/Hz

Floor

−161

dBc/Hz

AD9544/PCBZ 数据表(PDF) 18 Page - Analog Devices

AD9544/PCBZ 数据表(HTML) 18 Page - Analog Devices

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AD9544/PCBZ 数据表(PDF) 18 Page - Analog Devices

AD9544/PCBZ 数据表(HTML) 18 Page - Analog Devices

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