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Z8F021ASH020SC 数据表(PDF) 124 Page - Zilog, Inc. |
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Z8F021ASH020SC 数据表(HTML) 124 Page - Zilog, Inc. |
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124 / 276 page ![]() PS022815-0206 UART Z8 Encore! XP® 4K Series Product Specification 105 address mismatch occurs. 11 = The UART generates an interrupt request on all received data bytes for which the most recent address byte matched the value in the Address Compare Register. MPEN—MULTIPROCESSOR (9-bit) Enable This bit is used to enable MULTIPROCESSOR (9-bit) mode. 0 = Disable MULTIPROCESSOR (9-bit) mode. 1 = Enable MULTIPROCESSOR (9-bit) mode. MPBT—Multiprocessor Bit Transmit This bit is applicable only when MULTIPROCESSOR (9-bit) mode is enabled. The 9th bit is used by the receiving device to determine if the data byte contains address or data infor- mation. 0 = Send a 0 in the multiprocessor bit location of the data stream (data byte). 1 = Send a 1 in the multiprocessor bit location of the data stream (address byte). DEPOL—Driver Enable Polarity 0 = DE signal is Active High. 1 = DE signal is Active Low. BRGCTL—Baud Rate Control This bit causes an alternate UART behavior depending on the value of the REN bit in the UART Control 0 Register. When the UART receiver is not enabled (REN=0), this bit determines whether the Baud Rate Generator issues interrupts. 0 = Reads from the Baud Rate High and Low Byte registers return the BRG Reload Value 1 = The Baud Rate Generator generates a receive interrupt when it counts down to 0. Reads from the Baud Rate High and Low Byte registers return the current BRG count value. When the UART receiver is enabled (REN=1), this bit allows reads from the Baud Rate Registers to return the BRG count value instead of the Reload Value. 0 = Reads from the Baud Rate High and Low Byte registers return the BRG Reload Value. 1 = Reads from the Baud Rate High and Low Byte registers return the current BRG count value. Unlike the Timers, there is no mechanism to latch the Low Byte when the High Byte is read. RDAIRQ—Receive Data Interrupt Enable 0 = Received data and receiver errors generates an interrupt request to the Interrupt Con- troller. 1 = Received data does not generate an interrupt request to the Interrupt Controller. Only receiver errors generate an interrupt request. IREN—Infrared Encoder/Decoder Enable 0 = Infrared Encoder/Decoder is disabled. UART operates normally. 1 = Infrared Encoder/Decoder is enabled. The UART transmits and receives data through the Infrared Encoder/Decoder. |
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