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Z8F021ASH020SC 数据表(PDF) 240 Page - Zilog, Inc. |
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Z8F021ASH020SC 数据表(HTML) 240 Page - Zilog, Inc. |
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240 / 276 page ![]() PS022815-0206 Electrical Characteristics Z8 Encore! XP® 4K Series Product Specification 221 Table 137. Non Volatile Data Storage Parameter VDD = 2.7 - 3.6V TA = -40°C to +105°C Units Notes Minimum Typical Maximum NVDS Byte Read Time 34 – 519 µs With system clock at 20MHz NVDS Byte Program Time 0.171 – 39.7 ms With system clock at 20MHz Data Retention 100 – – years 25°C Endurance 160,000 – – cycles Cumulative write cycles for entire memory Table 138. Analog-to-Digital Converter Electrical Characteristics and Timing Symbol Parameter VDD = 3.0 to 3.6V TA = 0°C to +70°C Units Conditions Minimum Typical Maximum Resolution 10 – bits Differential Nonlinearity (DNL) -1.0 – 1.0 LSB3 External VREF = 2.0V; RS ← 3.0KΩ Integral Nonlinearity (INL) -3.0 – 3.0 LSB3 External VREF = 2.0V; RS ← 3.0KΩ Offset Error with Calibration +1LSB3 Absolute Accuracy with Calibration +3LSB3 VREF Internal Reference Voltage 1.0 2.0 1.1 2.2 1.2 2.4 V REFSEL=01 REFSEL=10 RREFOUT Reference Buffer Ouput Impedance 850 Ω When the internal reference is buffered and driven out to the VREF pin (REFOUT = 1) 1 Analog source impedance affects the ADC offset voltage (because of pin leakage) and input settling time. 2 Devices are factory calibrated at VDD = 3.3V and TA = +30°C, so the ADC is maximally accurate under these conditions. 3 LSBs are defined assuming 10-bit resolution. 4 The input impedance is inversely proportional to the system clock frequency. |
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