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Z8F021ASH020SC 数据表(PDF) 244 Page - Zilog, Inc. |
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Z8F021ASH020SC 数据表(HTML) 244 Page - Zilog, Inc. |
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244 / 276 page  PS022815-0206 Electrical Characteristics Z8 Encore! XP® 4K Series Product Specification 225 Figure 34. Port Input Sample Timing Table 142. GPIO Port Input Timing Parameter Abbreviation Delay (ns) Minimum Maximum TS_PORT Port Input Transition to XIN Rise Setup Time (Not pictured) 5– TH_PORT XIN Rise to Port Input Transition Hold Time (Not pictured) 0– TSMR GPIO Port Pin Pulse Width to ensure STOP Mode Recovery (for GPIO Port Pins enabled as SMR sources) 1 μs System TCLK Port Pin Port Value Changes to 0 0 Latched Into Port Input Input Value Port Input Data Register Latch Clock Data Register Port Input Data Read on Data Bus Port Input Data Register Value 0 Read by eZ8 |
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