DSP56303 datasheet(250/292 Pages) FREESCALE

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DSP56303 User’s Manual, Rev. 2

B-6

Freescale Semiconductor

Programming Reference

B.2 Interrupt Sources and Priorities

SCI

$FF9C

$FFFF9C

SCI Control Register (SCR)

$FF9B

$FFFF9B

SCI Clock Control Register (SCCR)

$FF9A

$FFFF9A

SCI Receive Data Register—High (SRXH)

$FF99

$FFFF99

SCI Receive Data Register—Middle (SRXM)

$FF98

$FFFF98

SCI Receive Data Register—Low (SRXL)

$FF97

$FFFF97

SCI Transmit Data Register—High (STXH)

$FF96

$FFFF96

SCI Transmit Data Register—Middle (STXM)

$FF95

$FFFF95

SCI Transmit Data Register—Low (STXL)

$FF94

$FFFF94

SCI Transmit Address Register (STXA)

$FF93

$FFFF93

SCI Status Register (SSR)

$FF92

$FFFF92

Reserved

$FF91

$FFFF91

Reserved

$FF90

$FFFF90

Reserved

Triple Timer

$FF8F

$FFFF8F

Timer 0 Control/Status Register (TCSR0)

$FF8E

$FFFF8E

Timer 0 Load Register (TLR0)

$FF8D

$FFFF8D

Timer 0 Compare Register (TCPR0)

$FF8C

$FFFF8C

Timer 0 Count Register (TCR0)

$FF8B

$FFFF8B

Timer 1 Control/Status Register (TCSR1)

$FF8A

$FFFF8A

Timer 1 Load Register (TLR1)

$FF89

$FFFF89

Timer 1 Compare Register (TCPR1)

$FF88

$FFFF88

Timer 1 Count Register (TCR1)

$FF87

$FFFF87

Timer 2 Control/Status Register (TCSR2)

$FF86

$FFFF86

Timer 2 Load Register (TLR2)

$FF85

$FFFF85

Timer 2 Compare Register (TCPR2)

$FF84

$FFFF84

Timer 2 Count Register (TCR2)

$FF83

$FFFF83

Timer Prescaler Load Register (TPLR)

$FF82

$FFFF82

Timer Prescaler Count Register (TPCR)

$FF81

$FFFF81

Reserved

$FF80

$FFFF80

Reserved

Table B-3. Interrupt Sources

Interrupt

Starting Address

Interrupt

Priority Level

Range

Interrupt Source

VBA:$00

Hardware RESET

Table B-2. Internal I/O Memory Map (Continued)(X Data Memory)

Peripheral

16-Bit Address

24-Bit Address

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