DSP56303 datasheet(172/292 Pages) FREESCALE

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DSP56303 User’s Manual, Rev. 2

8-4

Freescale Semiconductor

Serial Communication Interface (SCI)

8.2.1 Receive Data (RXD)

This input signal receives byte-oriented serial data and transfers the data to the SCI receive shift

× SCLK)

if the SCI Clock Polarity (SCKP) bit is cleared. RXD can be configured as a GPIO signal (PE0)

when the SCI RXD function is not in use.

8.2.2 Transmit Data (TXD)

This output signal transmits serial data from the SCI transmit shift register. Data changes on the

negative edge of the asynchronous transmit clock (SCLK) if SCKP is cleared. This output is stable

on the positive edge of the transmit clock. TXD can be programmed as a GPIO signal (PE1) when

the SCI TXD function is not in use.

8.2.3 SCI Serial Clock (SCLK)

This bidirectional signal provides an input or output clock from which the transmit and/or receive

baud rate is derived in Asynchronous mode and from which data is transferred in Synchronous

mode. SCLK can be programmed as a GPIO signal (PE2) when the SCI SCLK function is not in use.

This signal can be programmed as PE2 when data is being transmitted on TXD, since the clock

does not need to be transmitted in Asynchronous mode. Because SCLK is independent of SCI data

I/O, there is no connection between programming the PE2 signal as SCLK and data coming out the

TXD

signal.

8.3 SCI After Reset

There are several different ways to reset the SCI:

Hardware RESET signal

Software RESET instruction:

Both hardware and software resets clear the port control register bits, which configure all

I/O as GPIO input. The SCI remains in the Reset state as long as all SCI signals are

programmed as GPIO (PC2, PC1, and PC0 all are cleared); the SCI becomes active only

when at least one of the SCI I/O signals is not programmed as GPIO.

Individual reset:

During program execution, the PC2, PC1, and PC0 bits can all be cleared (that is,

individually reset), causing the SCI to stop serial activity and enter the Reset state. All SCI

status bits are set to their reset state. However, the contents of the SCR remain unaffected

so the DSP program can reset the SCI separately from the other internal peripherals.

During individual reset, internal DMA accesses to the data registers of the SCI are not

valid, and the data is unknown.

Stop processing state reset (that is, the STOP instruction)

Executing the STOP instruction halts operation of the SCI until the DSP is restarted,

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