ST10F280 datasheet(152/186 Pages) STMICROELECTRONICS

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ST10F280

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RP0H (F108h / 84h)

ESFR

Reset Value: - - XXH

Notes: 1. RP0H.7 to RP0H.5 bits are loaded only during a long hardware reset. As pull-up resistors are active on each Port P0H pins during

reset, RP0H default value is "FFh".

2. These bits are set according to Port 0 configuration during any reset sequence.

EXICON (F1C0h / E0h )

ESFR

Reset Value: 0000h

--------

CLKSEL

SALSEL

CSSEL

WRC

R 1 - 2

R 2

WRC 2

Write Configuration Control

‘0’: Pin WR acts as WRL, pin BHE acts as WRH

‘1’: Pins WR and BHE retain their normal function

CSSEL 2

Chip Select Line Selection (Number of active CS outputs)

0 0: 3 CS lines: CS2...CS0

0 1: 2 CS lines: CS1...CS0

1 0: No CS lines at all

1 1: 5 CS lines: CS4...CS0 (Default without pull-downs)

SALSEL 2

Segment Address Line Selection (Number of active segment address outputs)

0 0: 4-bit segment address: A19...A16

0 1: No segment address lines at all

1 0: 8-bit segment address: A23...A16

1 1: 2-bit segment address: A17...A16 (Default without pull-downs)

CLKSEL 1 - 2

System Clock Selection

000: fCPU = 2.5 x fOSC

001: fCPU = 0.5 x fOSC

010: fCPU = 10 x fOSC

011: fCPU = fOSC

100: fCPU = 5 x fOSC

101: fCPU = 2 x fOSC

110: fCPU = 3 x fOSC

111: fCPU = 4 x fOSC

9876543210

EXI7ES

EXI6ES

EXI5ES

EXI4ES

EXI3ES

EXI2ES

EXI1ES

EXI0ES

EXIxES(x=7...0)

External Interrupt x Edge Selection Field (x=7...0)

0 0:

Fast external interrupts disabled: standard mode

EXxIN pin not taken in account for entering/exiting Power Down mode.

0 1:

Interrupt on positive edge (rising)

Enter Power Down mode if EXiIN = ‘0’, exit if EXxIN = ‘1’ (referred as ‘high’ active level)

1 0:

Interrupt on negative edge (falling)

Enter Power Down mode if EXiIN = ‘1’, exit if EXxIN = ‘0’ (referred as ‘low’ active level)

1 1:

Interrupt on any edge (rising or falling)

Always enter Power Down mode, exit if EXxIN level changed.

ST10F280 数据表(PDF) 152 Page - STMicroelectronics

ST10F280 数据表(HTML) 152 Page - STMicroelectronics

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