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ST10F280 数据表(PDF) 153 Page - STMicroelectronics

部件名 ST10F280
功能描述  16-BIT MCU WITH MAC UNIT, 512K BYTE FLASH MEMORY AND 18K BYTE RAM
PDF  186 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST10F280 数据表(HTML) 153 Page - STMicroelectronics

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EXISEL (F1DAh / EDh)
ESFR
Reset Value: 0000h
XP3IC (F19Eh / CFh) 1
ESFR
Reset Value: - - 00h
Note: 1. XP3IC register has the same bit field as xxIC interrupt registers
xxIC (yyyyh / zzh)
SFR Area
Reset Value: - - 00h
15
14
13
12
11
10
9876543210
EXI7SS
EXI6SS
EXI5SS
EXI4SS
EXI3SS
EXI2SS
EXI1SS
EXI0SS
RW
RW
RW
RW
RW
RW
RW
RW
EXIxSS
External Interrupt x Source Selection (x=7...0)
‘00’:
Input from associated Port 2 pin.
‘01’:
Input from “alternate source”.
‘10’:
Input from Port 2 pin ORed with “alternate source”.
‘11’:
Input from Port 2 pin ANDed with “alternate source”.
EXIxSS
Port 2 pin
Alternate Source
0
P2.8
CAN1_RxD
1
P2.9
CAN2_RxD
2...7
P2.10...15
Not used (zero)
15
14
13
12
11
10
9876543210
-
-
-
-
-
-
-
-
XP3IR XP3IE
XP3ILVL
GLVL
RW
RW
RW
RW
15
14
13
12
11
10
9876543210
--------
xxIR
xxIE
ILVL
GLVL
RW
RW
RW
RW
Bit
Function
GLVL
Group Level
Defines the internal order for simultaneous requests of the same priority.
3: Highest group priority
0: Lowest group priority
ILVL
Interrupt Priority Level
Defines the priority level for the arbitration of requests.
Fh: Highest priority level
0h: Lowest priority level
xxIE
Interrupt Enable Control Bit (individually enables/disables a specific source)
‘0’: Interrupt Request is disabled
‘1’: Interrupt Request is enabled
xxIR
Interrupt Request Flag
‘0’: No request pending
‘1’: This source has raised an interrupt request



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