M32CSLASH8B datasheet(108/406 Pages) RENESAS

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Under development

M32C/8B Group

9. Clock Generation Circuits

Preliminary specification

Specifications in this manual are tentative and subject to change.

REJ09B0450-0050 Rev.0.50 Oct 31, 2008

Page 91 of 385

Figure 9.18

Procedure to Enter Stop Mode

Set an interrupt priority level of each interrupt

RLVL register: bits RLVL2 to RLVL0 = 7

Set the interrupt priority level (ILVL2 to ILVL0) of

the interrupt used to exit stop mode

I flag = 0

(1) Initial setting

Set the interrupt priority level of the interrupts,

which is not used to exit stop mode, to 0

FLG register: set IPL

Bits RLVL2 to RLVL0 = the same level as IPL

I flag = 1

CM1 register: CM10 bit = 1

(Note 2)

(2) Before entering stop mode

Stop mode

RLVL register: bits RLVL2 to RLVL0 = 7

(3) After exiting wait mode

PRCR register: PRC0 bit = 1

PRCR register: PRC1 bit = 1

CM2 register: CM20 bit = 0

(Note 1)

CM1 register: CM17 bit = 0

CM2 register: CM21 bit = 0

CM0 register: CM07 bit = 0

Select the main clock as the CPU clock source

(Set after a main clock oscillation is stabilized)

Start

End

Set the wait/stop mode exit interrupt priority level to 7.

Interrupt disabled

Set the exit interrupt priority level (RLVL2 to RLVL0)*

Enable writing to registers associated with clocks

Disable oscillation stop detect function

Interrupt enabled

All clocks stop

Set the exit priority level as soon as exiting wait mode

Set the processor interrupt priority level (IPL)*

NOTES:

1. This setting is required when the oscillation stop detect function is used.

2. Insert the jmp.b instruction as follows after the instruction to set the CM10 bit to 1.

MCD register: bits MCD4 to MCD0 = 00000b

Divide-by-16 mode

FMR4 register = 00h

FMR4 register = 01h

Flash memory low-speed access

FMR4 register = 00h

Flash memory normal-speed access

bset 0,

cm1

; all clocks stopped (stop mode)

jmp.b LABEL_001 ; jmp.b instruction executed (no instruction

LABEL_001:

; between jmp.b and LABEL.)

nop

; nop(1)

nop

; nop(2)

nop

; nop(3)

nop

; nop(4)

mov.b #0, prcr

; protection set

(ILVL2 to ILVL0) > IPL* = (RLVL2 to RLVL0)*

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